source: mainline/boot/arch/mips32/src/asm.S

Last change on this file was dabaa83, checked in by Jakub Jermar <jakub@…>, 6 years ago

Add boot arguments support for Malta

This commit makes it possible to pass console configuration via proper
boot arguemnts instead of having a hardcoded value in the kernel.

  • Property mode set to 100644
File size: 3.6 KB
RevLine 
[032a9b3]1#
[df4ed85]2# Copyright (c) 2006 Martin Decky
[032a9b3]3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
[0407636]29#include <abi/asmtool.h>
[4872160]30#include <arch/arch.h>
31#include <arch/regname.h>
[032a9b3]32
33.set noat
34.set noreorder
35
36.section BOOTSTRAP
37
[dabaa83]38/*
39 * Registers on entry:
40 *
41 * a0: kernel argument count (kargc)
42 * a1: kernel argument vector (kargv) of kargc elements
43 * a2: unused here (kenvp on Malta)
44 * a3: RAM size on Malta
45 *
46 * This is the case on Malta.
47 * msim clears these registers, so it is de facto correct as well.
48 */
[0407636]49SYMBOL(start)
[dc790e1]50 /*
51 * Setup the CP0 configuration
52 * - Disable 64-bit kernel addressing mode
[12bcae0]53 * - Disable 64-bit supervisor adressing mode
[dc790e1]54 * - Disable 64-bit user addressing mode
55 */
[dabaa83]56 mfc0 $t0, $status
57 la $t1, 0xffffff1f
58 and $t0, $t1, $t0
59 mtc0 $t0, $status
[bcad855]60
61#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
62 /*
63 * Remember the size of the SDRAM in bootinfo.
64 */
[dabaa83]65 la $t0, PA2KA(BOOTINFO_OFFSET)
66 sw $a3, 0($t0)
[bcad855]67#endif
[a35b458]68
[7cedc46a]69 /*
70 * Setup CPU map (on msim this code
71 * is executed in parallel on all CPUs,
72 * but it not an issue).
73 */
[dabaa83]74 la $t0, PA2KA(CPUMAP_OFFSET)
75
76 sw $zero, 0($t0)
77 sw $zero, 4($t0)
78 sw $zero, 8($t0)
79 sw $zero, 12($t0)
80
81 sw $zero, 16($t0)
82 sw $zero, 20($t0)
83 sw $zero, 24($t0)
84 sw $zero, 28($t0)
85
86 sw $zero, 32($t0)
87 sw $zero, 36($t0)
88 sw $zero, 40($t0)
89 sw $zero, 44($t0)
90
91 sw $zero, 48($t0)
92 sw $zero, 52($t0)
93 sw $zero, 56($t0)
94 sw $zero, 60($t0)
95
96 sw $zero, 64($t0)
97 sw $zero, 68($t0)
98 sw $zero, 72($t0)
99 sw $zero, 76($t0)
100
101 sw $zero, 80($t0)
102 sw $zero, 84($t0)
103 sw $zero, 88($t0)
104 sw $zero, 92($t0)
105
106 sw $zero, 96($t0)
107 sw $zero, 100($t0)
108 sw $zero, 104($t0)
109 sw $zero, 108($t0)
110
111 sw $zero, 112($t0)
112 sw $zero, 116($t0)
113 sw $zero, 120($t0)
114 sw $zero, 124($t0)
115
116 lui $t1, 1
[a35b458]117
[85156d3]118#ifdef MACHINE_msim
[a35b458]119
[85156d3]120 /* Read dorder value */
121 la $k0, MSIM_DORDER_ADDRESS
[96e0748d]122 lw $k1, ($k0)
[a35b458]123
[7cedc46a]124 /*
125 * If we are not running on BSP
126 * then end in an infinite loop.
127 */
[96e0748d]128 beq $k1, $zero, bsp
[032a9b3]129 nop
[a35b458]130
[96e0748d]131 /* Record CPU presence */
[dabaa83]132 sll $t2, $k1, 2
133 addu $t2, $t2, $t0
134 sw $t1, ($t2)
[a35b458]135
[85156d3]136 loop:
137 j loop
138 nop
[a35b458]139
[85156d3]140#endif
[a35b458]141
[85156d3]142 bsp:
[96e0748d]143 /* Record CPU presence */
[dabaa83]144 sw $t1, ($t0)
[a35b458]145
[85156d3]146 /* Setup initial stack */
[4872160]147 la $sp, PA2KA(STACK_OFFSET)
[a35b458]148
[dabaa83]149 /* a0=kargc, a1=kargv */
[85156d3]150 j bootstrap
151 nop
[4872160]152
153.text
154
[0407636]155FUNCTION_BEGIN(halt)
[4872160]156 j halt
157 nop
[0407636]158FUNCTION_END(halt)
[4872160]159
[0407636]160FUNCTION_BEGIN(jump_to_kernel)
[4872160]161 j $a0
162 nop
[0407636]163FUNCTION_END(jump_to_kernel)
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