source: mainline/boot/arch/ia64/src/asm.S@ 6cb8dba

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 6cb8dba was 807102ca, checked in by Jakub Jermar <jakub@…>, 15 years ago

Revive the ia64's loader.

At this stage, the ia64 port builds flawlessly and the loader even starts
inflating the components, but after some time it fails on the first one.

  • Property mode set to 100644
File size: 3.0 KB
Line 
1#
2# Copyright (c) 2006 Martin Decky
3# Copyright (c) 2006 Jakub Jermar
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions
8# are met:
9#
10# - Redistributions of source code must retain the above copyright
11# notice, this list of conditions and the following disclaimer.
12# - Redistributions in binary form must reproduce the above copyright
13# notice, this list of conditions and the following disclaimer in the
14# documentation and/or other materials provided with the distribution.
15# - The name of the author may not be used to endorse or promote products
16# derived from this software without specific prior written permission.
17#
18# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28#
29
30#include <arch/arch.h>
31
32.text
33
34.global halt
35.global memcpy
36.global jump_to_kernel
37
38halt:
39 br halt
40
41memcpy:
42 alloc loc0 = ar.pfs, 3, 1, 0, 0
43
44 adds r14 = 7, in1
45 mov r2 = ar.lc
46 mov r8 = in0 ;;
47 and r14 = -8, r14 ;;
48 cmp.ne p6, p7 = r14, in1
49(p7) br.cond.dpnt 3f ;;
500:
51 cmp.ne p6, p7 = 0, in2
52(p7) br.cond.dpnt 2f ;;
53(p6) adds r14 = -1, in2
54(p6) mov r16 = r0
55(p6) mov r17 = r0 ;;
56(p6) mov ar.lc = r14
571:
58 add r14 = r16, in1
59 add r15 = r16, in0
60 adds r17 = 1, r17 ;;
61 ld1 r14 = [r14]
62 mov r16 = r17 ;;
63 st1 [r15] = r14
64 br.cloop.sptk.few 1b ;;
652:
66 mov ar.lc = r2
67 mov ar.pfs = loc0
68 br.ret.sptk.many rp
693:
70 adds r14 = 7, in0 ;;
71 and r14 = -8, r14 ;;
72 cmp.eq p6, p7 = r14, in0
73(p7) br.cond.dptk 0b
74 shr.u r18 = in2, 3 ;;
75 cmp.ne p6, p7 = 0, r18
76(p7) br.cond.dpnt 5f ;;
77(p6) adds r14 = -1, r18
78(p6) mov r16 = r0
79(p6) mov r17 = r0 ;;
80(p6) mov ar.lc = r14
814:
82 shladd r14 = r16, 3, r0
83 adds r16 = 1, r17 ;;
84 add r15 = in1, r14
85 add r14 = in0, r14
86 mov r17 = r16 ;;
87 ld8 r15 = [r15] ;;
88 st8 [r14] = r15
89 br.cloop.sptk.few 4b
905:
91 and r15 = 7, in2
92 shladd r14 = r18, 3, r0
93 mov r16 = r0
94 mov r18 = r0 ;;
95 cmp.eq p6, p7 = 0, r15
96 add in0 = r14, in0
97 adds r15 = -1, r15
98 add r17 = r14, in1
99(p6) br.cond.dpnt 2b ;;
100 mov ar.lc = r15
1016:
102 add r14 = r16, r17
103 add r15 = r16, in0
104 adds r16 = 1, r18 ;;
105 ld1 r14 = [r14]
106 mov r18 = r16 ;;
107 st1 [r15] = r14
108 br.cloop.sptk.few 6b ;;
109 mov ar.lc = r2
110 mov ar.pfs = loc0
111 br.ret.sptk.many rp
112
113jump_to_kernel:
114 alloc loc0 = ar.pfs, 1, 1, 0, 0
115 mov r1 = in0; # Pass bootinfo address
116 movl r8 = KERNEL_ADDRESS;;
117 mov b1 = r8 ;;
118 br.call.sptk.many b0 = b1;;
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