source: mainline/boot/arch/arm32/src/mm.c@ d969a9a

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since d969a9a was 4872160, checked in by Martin Decky <martin@…>, 15 years ago

new boot infrastructure

  • more code and metadata unification
  • import of up-to-date implementations from the kernel
  • the boot loaders should behave more similarly on all platforms
  • support for deflate compressed (LZ77) boot components
    • this again allows feasible boot images to be created on mips32
  • IA64 is still not booting
    • the broken forked GNU EFI library has been removed, a replacement of the functionality is on its way
  • Property mode set to 100644
File size: 3.5 KB
Line 
1/*
2 * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup arm32boot
30 * @{
31 */
32/** @file
33 * @brief Memory management used while booting the kernel.
34 */
35
36#include <typedefs.h>
37#include <arch/asm.h>
38#include <arch/mm.h>
39
40/** Initialize "section" page table entry.
41 *
42 * Will be readable/writable by kernel with no access from user mode.
43 * Will belong to domain 0. No cache or buffering is enabled.
44 *
45 * @param pte Section entry to initialize.
46 * @param frame First frame in the section (frame number).
47 *
48 * @note If frame is not 1 MB aligned, first lower 1 MB aligned frame will be
49 * used.
50 *
51 */
52static void init_ptl0_section(pte_level0_section_t* pte,
53 pfn_t frame)
54{
55 pte->descriptor_type = PTE_DESCRIPTOR_SECTION;
56 pte->bufferable = 0;
57 pte->cacheable = 0;
58 pte->impl_specific = 0;
59 pte->domain = 0;
60 pte->should_be_zero_1 = 0;
61 pte->access_permission = PTE_AP_USER_NO_KERNEL_RW;
62 pte->should_be_zero_2 = 0;
63 pte->section_base_addr = frame;
64}
65
66/** Initialize page table used while booting the kernel. */
67static void init_boot_pt(void)
68{
69 pfn_t split_page = 0x800;
70
71 /* Create 1:1 virtual-physical mapping (in lower 2 GB). */
72 pfn_t page;
73 for (page = 0; page < split_page; page++)
74 init_ptl0_section(&boot_pt[page], page);
75
76 /*
77 * Create 1:1 virtual-physical mapping in kernel space
78 * (upper 2 GB), physical addresses start from 0.
79 */
80 for (page = split_page; page < PTL0_ENTRIES; page++)
81 init_ptl0_section(&boot_pt[page], page - split_page);
82
83 asm volatile (
84 "mcr p15, 0, %[pt], c2, c0, 0\n"
85 :: [pt] "r" (boot_pt)
86 );
87}
88
89static void enable_paging()
90{
91 /* c3 - each two bits controls access to the one of domains (16)
92 * 0b01 - behave as a client (user) of a domain
93 */
94 asm volatile (
95 /* Behave as a client of domains */
96 "ldr r0, =0x55555555\n"
97 "mcr p15, 0, r0, c3, c0, 0\n"
98
99 /* Current settings */
100 "mrc p15, 0, r0, c1, c0, 0\n"
101
102 /* Mask to enable paging */
103 "ldr r1, =0x00000001\n"
104 "orr r0, r0, r1\n"
105
106 /* Store settings */
107 "mcr p15, 0, r0, c1, c0, 0\n"
108 ::: "r0", "r1"
109 );
110}
111
112/** Start the MMU - initialize page table and enable paging. */
113void mmu_start() {
114 init_boot_pt();
115 enable_paging();
116}
117
118/** @}
119 */
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