source: mainline/boot/arch/arm32/src/main.c@ 15fbe6a

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 15fbe6a was 15fbe6a, checked in by Jakub Jermar <jakub@…>, 10 years ago

Fix clean_dcache_poc() wrt. ARMv6-

Clean D$ according to the actual architecture and processor.
Make sure the MVA is always CP15_C7_MVA_ALIGN-aligned.

  • Property mode set to 100644
File size: 4.6 KB
RevLine 
[4872160]1/*
2 * Copyright (c) 2007 Michal Kebrt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup arm32boot
30 * @{
31 */
32/** @file
33 * @brief Bootstrap.
34 */
35
36#include <arch/main.h>
37#include <arch/asm.h>
38#include <arch/mm.h>
39#include <arch/_components.h>
40#include <halt.h>
41#include <printf.h>
42#include <memstr.h>
43#include <version.h>
44#include <macros.h>
45#include <align.h>
46#include <str.h>
47#include <errno.h>
48#include <inflate.h>
[15fbe6a]49#include <arch/cp15.h>
[4872160]50
51#define TOP2ADDR(top) (((void *) PA2KA(BOOT_OFFSET)) + (top))
52
[bfb6576]53extern void *bdata_start;
54extern void *bdata_end;
55
[b80d132]56static inline void clean_dcache_poc(void *address, size_t size)
[bfb6576]57{
[15fbe6a]58 const uintptr_t addr = (uintptr_t) address;
59
60#if !defined(PROCESSOR_ARCH_armv7_a)
61 bool sep;
62 if (MIDR_read() != CTR_read()) {
63 sep = (CTR_read() & CTR_SEP_FLAG) == CTR_SEP_FLAG;
64 } else {
65 printf("Unknown cache type.\n");
66 halt();
67 }
68#endif
69
70 for (uintptr_t a = ALIGN_DOWN(addr, CP15_C7_MVA_ALIGN); a < addr + size;
71 a += CP15_C7_MVA_ALIGN) {
72#if defined(PROCESSOR_ARCH_armv7_a)
73 DCCMVAC_write(a);
74#else
75 if (sep)
76 DCCMVA_write(a);
77 else
78 CCMVA_write(a);
79#endif
[bfb6576]80 }
81}
82
[4872160]83static bootinfo_t bootinfo;
84
85void bootstrap(void)
86{
[bfb6576]87 /* Enable MMU and caches */
[4872160]88 mmu_start();
89 version_print();
90
[bfb6576]91 printf("Boot data: %p -> %p\n", &bdata_start, &bdata_end);
[4872160]92 printf("\nMemory statistics\n");
93 printf(" %p|%p: bootstrap stack\n", &boot_stack, &boot_stack);
94 printf(" %p|%p: bootstrap page table\n", &boot_pt, &boot_pt);
95 printf(" %p|%p: boot info structure\n", &bootinfo, &bootinfo);
[7e752b2]96 printf(" %p|%p: kernel entry point\n",
97 (void *) PA2KA(BOOT_OFFSET), (void *) BOOT_OFFSET);
[4872160]98
[bfb6576]99 for (size_t i = 0; i < COMPONENTS; i++) {
[4872160]100 printf(" %p|%p: %s image (%u/%u bytes)\n", components[i].start,
101 components[i].start, components[i].name, components[i].inflated,
102 components[i].size);
[bfb6576]103 }
[4872160]104
105 void *dest[COMPONENTS];
106 size_t top = 0;
107 size_t cnt = 0;
108 bootinfo.cnt = 0;
[bfb6576]109 for (size_t i = 0; i < min(COMPONENTS, TASKMAP_MAX_RECORDS); i++) {
[4872160]110 top = ALIGN_UP(top, PAGE_SIZE);
111
112 if (i > 0) {
113 bootinfo.tasks[bootinfo.cnt].addr = TOP2ADDR(top);
114 bootinfo.tasks[bootinfo.cnt].size = components[i].inflated;
115
116 str_cpy(bootinfo.tasks[bootinfo.cnt].name,
117 BOOTINFO_TASK_NAME_BUFLEN, components[i].name);
118
119 bootinfo.cnt++;
120 }
121
122 dest[i] = TOP2ADDR(top);
123 top += components[i].inflated;
124 cnt++;
125 }
126
127 printf("\nInflating components ... ");
128
[bfb6576]129 for (size_t i = cnt; i > 0; i--) {
[4872160]130 void *tail = components[i - 1].start + components[i - 1].size;
131 if (tail >= dest[i - 1]) {
132 printf("\n%s: Image too large to fit (%p >= %p), halting.\n",
133 components[i].name, tail, dest[i - 1]);
134 halt();
135 }
136
137 printf("%s ", components[i - 1].name);
138
139 int err = inflate(components[i - 1].start, components[i - 1].size,
140 dest[i - 1], components[i - 1].inflated);
141 if (err != EOK) {
142 printf("\n%s: Inflating error %d\n", components[i - 1].name, err);
143 halt();
144 }
[f288d85]145 /* Make sure data are in the memory, ICache will need them */
[b80d132]146 clean_dcache_poc(dest[i - 1], components[i - 1].inflated);
[4872160]147 }
148
149 printf(".\n");
[7cd15b9]150
151 /* Flush PT too. We need this if we disable caches later */
152 clean_dcache_poc(boot_pt, PTL0_ENTRIES * PTL0_ENTRY_SIZE);
[4872160]153
[83742a4]154 printf("Booting the kernel...\n");
[cfeb368]155 jump_to_kernel((void *) PA2KA(BOOT_OFFSET), &bootinfo);
[4872160]156}
157
158/** @}
159 */
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