source: mainline/boot/arch/arm32/include/mm.h@ 949869d

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 949869d was 4d02595, checked in by Jan Vesely <jano.vesely@…>, 13 years ago

arm32, boot: Turn on caching and alignment, in addition to paging.

This should speed things up a little.

  • Property mode set to 100644
File size: 2.8 KB
Line 
1/*
2 * Copyright (c) 2007 Pavel Jancik
3 * Copyright (c) 2007 Michal Kebrt
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30/** @addtogroup arm32boot
31 * @{
32 */
33/** @file
34 * @brief Memory management used while booting the kernel.
35 *
36 * So called "section" paging is used while booting the kernel. The term
37 * "section" comes from the ARM architecture specification and stands for the
38 * following: one-level paging, 1MB sized pages, 4096 entries in the page
39 * table.
40 */
41
42#ifndef BOOT_arm32__MM_H
43#define BOOT_arm32__MM_H
44
45#include <typedefs.h>
46
47/** Describe "section" page table entry (one-level paging with 1 MB sized pages). */
48#define PTE_DESCRIPTOR_SECTION 0x02
49
50/** Page table access rights: user - no access, kernel - read/write. */
51#define PTE_AP_USER_NO_KERNEL_RW 0x01
52
53/* Page table level 0 entry - "section" format is used
54 * (one-level paging, 1 MB sized pages). Used only while booting the kernel.
55 */
56typedef struct {
57 unsigned int descriptor_type : 2;
58 unsigned int bufferable : 1;
59 unsigned int cacheable : 1;
60 unsigned int xn : 1;
61 unsigned int domain : 4;
62 unsigned int should_be_zero_1 : 1;
63 unsigned int access_permission_0 : 2;
64 unsigned int tex : 3;
65 unsigned int access_permission_1 : 2;
66 unsigned int non_global : 1;
67 unsigned int should_be_zero_2 : 1;
68 unsigned int non_secure : 1;
69 unsigned int section_base_addr : 12;
70} __attribute__((packed)) pte_level0_section_t;
71
72extern void mmu_start(void);
73
74#endif
75
76/** @}
77 */
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