source: mainline/arch/ppc32/src/mm/page.c@ bebb6bc

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since bebb6bc was c782434, checked in by Martin Decky <martin@…>, 19 years ago

generalize ppc32 exception handling

  • Property mode set to 100644
File size: 7.3 KB
Line 
1/*
2 * Copyright (C) 2005 Martin Decky
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <arch/mm/page.h>
30#include <genarch/mm/page_pt.h>
31#include <arch/mm/frame.h>
32#include <arch/asm.h>
33#include <arch/interrupt.h>
34#include <mm/frame.h>
35#include <mm/page.h>
36#include <mm/as.h>
37#include <arch.h>
38#include <arch/types.h>
39#include <arch/exception.h>
40#include <align.h>
41#include <config.h>
42#include <print.h>
43#include <symtab.h>
44
45static phte_t *phte;
46
47
48/** Try to find PTE for faulting address
49 *
50 * Try to find PTE for faulting address.
51 * The as->lock must be held on entry to this function
52 * if lock is true.
53 *
54 * @param as Address space.
55 * @param lock Lock/unlock the address space.
56 * @param badvaddr Faulting virtual address.
57 * @param access Access mode that caused the fault.
58 * @param istate Pointer to interrupted state.
59 * @param pfrc Pointer to variable where as_page_fault() return code will be stored.
60 * @return PTE on success, NULL otherwise.
61 *
62 */
63static pte_t *find_mapping_and_check(as_t *as, bool lock, __address badvaddr, int access,
64 istate_t *istate, int *pfcr)
65{
66 /*
67 * Check if the mapping exists in page tables.
68 */
69 pte_t *pte = page_mapping_find(as, badvaddr);
70 if ((pte) && (pte->p)) {
71 /*
72 * Mapping found in page tables.
73 * Immediately succeed.
74 */
75 return pte;
76 } else {
77 int rc;
78
79 /*
80 * Mapping not found in page tables.
81 * Resort to higher-level page fault handler.
82 */
83 page_table_unlock(as, lock);
84 switch (rc = as_page_fault(badvaddr, access, istate)) {
85 case AS_PF_OK:
86 /*
87 * The higher-level page fault handler succeeded,
88 * The mapping ought to be in place.
89 */
90 page_table_lock(as, lock);
91 pte = page_mapping_find(as, badvaddr);
92 ASSERT((pte) && (pte->p));
93 return pte;
94 case AS_PF_DEFER:
95 page_table_lock(as, lock);
96 *pfcr = rc;
97 return NULL;
98 case AS_PF_FAULT:
99 page_table_lock(as, lock);
100 printf("Page fault.\n");
101 *pfcr = rc;
102 return NULL;
103 default:
104 panic("unexpected rc (%d)\n", rc);
105 }
106 }
107}
108
109
110static void pht_refill_fail(__address badvaddr, istate_t *istate)
111{
112 char *symbol = "";
113 char *sym2 = "";
114
115 char *s = get_symtab_entry(istate->pc);
116 if (s)
117 symbol = s;
118 s = get_symtab_entry(istate->lr);
119 if (s)
120 sym2 = s;
121 panic("%p: PHT Refill Exception at %p (%s<-%s)\n", badvaddr, istate->pc, symbol, sym2);
122}
123
124
125static void pht_insert(const __address vaddr, const pfn_t pfn)
126{
127 __u32 page = (vaddr >> 12) & 0xffff;
128 __u32 api = (vaddr >> 22) & 0x3f;
129 __u32 vsid;
130
131 asm volatile (
132 "mfsrin %0, %1\n"
133 : "=r" (vsid)
134 : "r" (vaddr)
135 );
136
137 /* Primary hash (xor) */
138 __u32 h = 0;
139 __u32 hash = vsid ^ page;
140 __u32 base = (hash & 0x3ff) << 3;
141 __u32 i;
142 bool found = false;
143
144 /* Find unused or colliding
145 PTE in PTEG */
146 for (i = 0; i < 8; i++) {
147 if ((!phte[base + i].v) || ((phte[base + i].vsid == vsid) && (phte[base + i].api == api))) {
148 found = true;
149 break;
150 }
151 }
152
153 if (!found) {
154 /* Secondary hash (not) */
155 __u32 base2 = (~hash & 0x3ff) << 3;
156
157 /* Find unused or colliding
158 PTE in PTEG */
159 for (i = 0; i < 8; i++) {
160 if ((!phte[base2 + i].v) || ((phte[base2 + i].vsid == vsid) && (phte[base2 + i].api == api))) {
161 found = true;
162 base = base2;
163 h = 1;
164 break;
165 }
166 }
167
168 if (!found) {
169 // TODO: A/C precedence groups
170 i = page % 8;
171 }
172 }
173
174 phte[base + i].v = 1;
175 phte[base + i].vsid = vsid;
176 phte[base + i].h = h;
177 phte[base + i].api = api;
178 phte[base + i].rpn = pfn;
179 phte[base + i].r = 0;
180 phte[base + i].c = 0;
181 phte[base + i].pp = 2; // FIXME
182}
183
184
185/** Process Instruction/Data Storage Interrupt
186 *
187 * @param data True if Data Storage Interrupt.
188 * @param istate Interrupted register context.
189 *
190 */
191void pht_refill(int n, istate_t *istate)
192{
193 __address badvaddr;
194 pte_t *pte;
195 int pfcr;
196 as_t *as;
197 bool lock;
198
199 if (AS == NULL) {
200 as = AS_KERNEL;
201 lock = false;
202 } else {
203 as = AS;
204 lock = true;
205 }
206
207 if (n == VECTOR_DATA_STORAGE) {
208 asm volatile (
209 "mfdar %0\n"
210 : "=r" (badvaddr)
211 );
212 } else
213 badvaddr = istate->pc;
214
215 page_table_lock(as, lock);
216
217 pte = find_mapping_and_check(as, lock, badvaddr, PF_ACCESS_READ /* FIXME */, istate, &pfcr);
218 if (!pte) {
219 switch (pfcr) {
220 case AS_PF_FAULT:
221 goto fail;
222 break;
223 case AS_PF_DEFER:
224 /*
225 * The page fault came during copy_from_uspace()
226 * or copy_to_uspace().
227 */
228 page_table_unlock(as, lock);
229 return;
230 default:
231 panic("Unexpected pfrc (%d)\n", pfcr);
232 }
233 }
234
235 pte->a = 1; /* Record access to PTE */
236 pht_insert(badvaddr, pte->pfn);
237
238 page_table_unlock(as, lock);
239 return;
240
241fail:
242 page_table_unlock(as, lock);
243 pht_refill_fail(badvaddr, istate);
244}
245
246
247void pht_init(void)
248{
249 memsetb((__address) phte, 1 << PHT_BITS, 0);
250}
251
252
253void page_arch_init(void)
254{
255 if (config.cpu_active == 1) {
256 page_mapping_operations = &pt_mapping_operations;
257
258 __address cur;
259 int flags;
260
261 /* Frames below 128 MB are mapped using BAT,
262 map rest of the physical memory */
263 for (cur = 128 << 20; cur < last_frame; cur += FRAME_SIZE) {
264 flags = PAGE_CACHEABLE;
265 if ((PA2KA(cur) >= config.base) && (PA2KA(cur) < config.base + config.kernel_size))
266 flags |= PAGE_GLOBAL;
267 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags);
268 }
269
270 /* Allocate page hash table */
271 phte_t *physical_phte = (phte_t *) PFN2ADDR(frame_alloc(PHT_ORDER, FRAME_KA | FRAME_PANIC));
272 phte = (phte_t *) PA2KA((__address) physical_phte);
273
274 ASSERT((__address) physical_phte % (1 << PHT_BITS) == 0);
275 pht_init();
276
277 asm volatile (
278 "mtsdr1 %0\n"
279 :
280 : "r" ((__address) physical_phte)
281 );
282 }
283}
284
285
286__address hw_map(__address physaddr, size_t size)
287{
288 if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
289 panic("Unable to map physical memory %p (%d bytes)", physaddr, size)
290
291 __address virtaddr = PA2KA(last_frame);
292 pfn_t i;
293 for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++)
294 page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE);
295
296 last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);
297
298 return virtaddr;
299}
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