source: mainline/arch/ppc32/src/asm.S@ c0bc189

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since c0bc189 was 35f3b8c, checked in by Martin Decky <martin@…>, 20 years ago

ppc32 work
update framebuffer
get rid of the BAT memory mapping (not finished yet)
  • Property mode set to 100644
File size: 5.1 KB
Line 
1#
2# Copyright (C) 2005 Martin Decky
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29#include <arch/asm/regname.h>
30
31.text
32
33.global userspace_asm
34.global iret
35.global iret_syscall
36.global invalidate_bat
37.global memsetb
38.global memcpy
39.global memcpy_from_uspace
40.global memcpy_to_uspace
41.global memcpy_from_uspace_failover_address
42.global memcpy_to_uspace_failover_address
43
44userspace_asm:
45
46 # r3 = uspace_uarg
47 # r4 = stack
48 # r5 = entry
49
50 # disable interrupts
51
52 mfmsr r31
53 rlwinm r31, r31, 0, 17, 15
54 mtmsr r31
55
56 # set entry point
57
58 mtsrr0 r5
59
60 # set problem state, enable interrupts
61
62 ori r31, r31, msr_pr
63 ori r31, r31, msr_ee
64 mtsrr1 r31
65
66 # set stack
67
68 mr sp, r4
69
70 # jump to userspace
71
72 rfi
73
74iret:
75
76 # disable interrupts
77
78 mfmsr r31
79 rlwinm r31, r31, 0, 17, 15
80 mtmsr r31
81
82 lwz r0, 8(sp)
83 lwz r2, 12(sp)
84 lwz r3, 16(sp)
85 lwz r4, 20(sp)
86 lwz r5, 24(sp)
87 lwz r6, 28(sp)
88 lwz r7, 32(sp)
89 lwz r8, 36(sp)
90 lwz r9, 40(sp)
91 lwz r10, 44(sp)
92 lwz r11, 48(sp)
93 lwz r13, 52(sp)
94 lwz r14, 56(sp)
95 lwz r15, 60(sp)
96 lwz r16, 64(sp)
97 lwz r17, 68(sp)
98 lwz r18, 72(sp)
99 lwz r19, 76(sp)
100 lwz r20, 80(sp)
101 lwz r21, 84(sp)
102 lwz r22, 88(sp)
103 lwz r23, 92(sp)
104 lwz r24, 96(sp)
105 lwz r25, 100(sp)
106 lwz r26, 104(sp)
107 lwz r27, 108(sp)
108 lwz r28, 112(sp)
109 lwz r29, 116(sp)
110 lwz r30, 120(sp)
111 lwz r31, 124(sp)
112
113 lwz r12, 128(sp)
114 mtcr r12
115
116 lwz r12, 132(sp)
117 mtsrr0 r12
118
119 lwz r12, 136(sp)
120 mtsrr1 r12
121
122 lwz r12, 140(sp)
123 mtlr r12
124
125 lwz r12, 144(sp)
126 mtctr r12
127
128 lwz r12, 148(sp)
129 mtxer r12
130
131 lwz r12, 152(sp)
132 lwz sp, 156(sp)
133
134 rfi
135
136iret_syscall:
137
138 # disable interrupts
139
140 mfmsr r31
141 rlwinm r31, r31, 0, 17, 15
142 mtmsr r31
143
144 lwz r0, 8(sp)
145 lwz r2, 12(sp)
146 lwz r4, 20(sp)
147 lwz r5, 24(sp)
148 lwz r6, 28(sp)
149 lwz r7, 32(sp)
150 lwz r8, 36(sp)
151 lwz r9, 40(sp)
152 lwz r10, 44(sp)
153 lwz r11, 48(sp)
154 lwz r13, 52(sp)
155 lwz r14, 56(sp)
156 lwz r15, 60(sp)
157 lwz r16, 64(sp)
158 lwz r17, 68(sp)
159 lwz r18, 72(sp)
160 lwz r19, 76(sp)
161 lwz r20, 80(sp)
162 lwz r21, 84(sp)
163 lwz r22, 88(sp)
164 lwz r23, 92(sp)
165 lwz r24, 96(sp)
166 lwz r25, 100(sp)
167 lwz r26, 104(sp)
168 lwz r27, 108(sp)
169 lwz r28, 112(sp)
170 lwz r29, 116(sp)
171 lwz r30, 120(sp)
172 lwz r31, 124(sp)
173
174 lwz r12, 128(sp)
175 mtcr r12
176
177 lwz r12, 132(sp)
178 mtsrr0 r12
179
180 lwz r12, 136(sp)
181 mtsrr1 r12
182
183 lwz r12, 140(sp)
184 mtlr r12
185
186 lwz r12, 144(sp)
187 mtctr r12
188
189 lwz r12, 148(sp)
190 mtxer r12
191
192 lwz r12, 152(sp)
193 lwz sp, 156(sp)
194
195 rfi
196
197invalidate_bat:
198
199 # invalidate block address translation registers
200
201 li r14, 0
202
203 mtspr ibat0u, r14
204 mtspr ibat0l, r14
205
206 mtspr ibat1u, r14
207 mtspr ibat1l, r14
208
209 mtspr ibat2u, r14
210 mtspr ibat2l, r14
211
212 mtspr ibat3u, r14
213 mtspr ibat3l, r14
214
215 mtspr dbat0u, r14
216 mtspr dbat0l, r14
217
218 mtspr dbat1u, r14
219 mtspr dbat1l, r14
220
221 mtspr dbat2u, r14
222 mtspr dbat2l, r14
223
224 mtspr dbat3u, r14
225 mtspr dbat3l, r14
226
227 blr
228
229memsetb:
230 rlwimi r5, r5, 8, 16, 23
231 rlwimi r5, r5, 16, 0, 15
232
233 addi r14, r3, -4
234
235 cmplwi 0, r4, 4
236 blt 7f
237
238 stwu r5, 4(r14)
239 beqlr
240
241 andi. r15, r14, 3
242 add r4, r15, r4
243 subf r14, r15, r14
244 srwi r15, r4, 2
245 mtctr r15
246
247 bdz 6f
248
249 1:
250 stwu r5, 4(r14)
251 bdnz 1b
252
253 6:
254
255 andi. r4, r4, 3
256
257 7:
258
259 cmpwi 0, r4, 0
260 beqlr
261
262 mtctr r4
263 addi r6, r6, 3
264
265 8:
266
267 stbu r5, 1(r14)
268 bdnz 8b
269
270 blr
271
272memcpy:
273memcpy_from_uspace:
274memcpy_to_uspace:
275
276 srwi. r7, r5, 3
277 addi r6, r3, -4
278 addi r4, r4, -4
279 beq 2f
280
281 andi. r0, r6, 3
282 mtctr r7
283 bne 5f
284
285 1:
286
287 lwz r7, 4(r4)
288 lwzu r8, 8(r4)
289 stw r7, 4(r6)
290 stwu r8, 8(r6)
291 bdnz 1b
292
293 andi. r5, r5, 7
294
295 2:
296
297 cmplwi 0, r5, 4
298 blt 3f
299
300 lwzu r0, 4(r4)
301 addi r5, r5, -4
302 stwu r0, 4(r6)
303
304 3:
305
306 cmpwi 0, r5, 0
307 beqlr
308 mtctr r5
309 addi r4, r4, 3
310 addi r6, r6, 3
311
312 4:
313
314 lbzu r0, 1(r4)
315 stbu r0, 1(r6)
316 bdnz 4b
317 blr
318
319 5:
320
321 subfic r0, r0, 4
322 mtctr r0
323
324 6:
325
326 lbz r7, 4(r4)
327 addi r4, r4, 1
328 stb r7, 4(r6)
329 addi r6, r6, 1
330 bdnz 6b
331 subf r5, r0, r5
332 rlwinm. r7, r5, 32-3, 3, 31
333 beq 2b
334 mtctr r7
335 b 1b
336
337memcpy_from_uspace_failover_address:
338memcpy_to_uspace_failover_address:
339 b memcpy_from_uspace_failover_address
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