source: mainline/arch/ppc32/src/asm.S@ 125e944

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 125e944 was 9ea6cc5, checked in by Martin Decky <martin@…>, 19 years ago

kernel identity mapping still to be done using BAT
  • Property mode set to 100644
File size: 4.7 KB
Line 
1#
2# Copyright (C) 2005 Martin Decky
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29#include <arch/asm/regname.h>
30
31.text
32
33.global userspace_asm
34.global iret
35.global iret_syscall
36.global memsetb
37.global memcpy
38.global memcpy_from_uspace
39.global memcpy_to_uspace
40.global memcpy_from_uspace_failover_address
41.global memcpy_to_uspace_failover_address
42
43userspace_asm:
44
45 # r3 = uspace_uarg
46 # r4 = stack
47 # r5 = entry
48
49 # disable interrupts
50
51 mfmsr r31
52 rlwinm r31, r31, 0, 17, 15
53 mtmsr r31
54
55 # set entry point
56
57 mtsrr0 r5
58
59 # set problem state, enable interrupts
60
61 ori r31, r31, msr_pr
62 ori r31, r31, msr_ee
63 mtsrr1 r31
64
65 # set stack
66
67 mr sp, r4
68
69 # jump to userspace
70
71 rfi
72
73iret:
74
75 # disable interrupts
76
77 mfmsr r31
78 rlwinm r31, r31, 0, 17, 15
79 mtmsr r31
80
81 lwz r0, 8(sp)
82 lwz r2, 12(sp)
83 lwz r3, 16(sp)
84 lwz r4, 20(sp)
85 lwz r5, 24(sp)
86 lwz r6, 28(sp)
87 lwz r7, 32(sp)
88 lwz r8, 36(sp)
89 lwz r9, 40(sp)
90 lwz r10, 44(sp)
91 lwz r11, 48(sp)
92 lwz r13, 52(sp)
93 lwz r14, 56(sp)
94 lwz r15, 60(sp)
95 lwz r16, 64(sp)
96 lwz r17, 68(sp)
97 lwz r18, 72(sp)
98 lwz r19, 76(sp)
99 lwz r20, 80(sp)
100 lwz r21, 84(sp)
101 lwz r22, 88(sp)
102 lwz r23, 92(sp)
103 lwz r24, 96(sp)
104 lwz r25, 100(sp)
105 lwz r26, 104(sp)
106 lwz r27, 108(sp)
107 lwz r28, 112(sp)
108 lwz r29, 116(sp)
109 lwz r30, 120(sp)
110 lwz r31, 124(sp)
111
112 lwz r12, 128(sp)
113 mtcr r12
114
115 lwz r12, 132(sp)
116 mtsrr0 r12
117
118 lwz r12, 136(sp)
119 mtsrr1 r12
120
121 lwz r12, 140(sp)
122 mtlr r12
123
124 lwz r12, 144(sp)
125 mtctr r12
126
127 lwz r12, 148(sp)
128 mtxer r12
129
130 lwz r12, 152(sp)
131 lwz sp, 156(sp)
132
133 rfi
134
135iret_syscall:
136
137 # disable interrupts
138
139 mfmsr r31
140 rlwinm r31, r31, 0, 17, 15
141 mtmsr r31
142
143 lwz r0, 8(sp)
144 lwz r2, 12(sp)
145 lwz r4, 20(sp)
146 lwz r5, 24(sp)
147 lwz r6, 28(sp)
148 lwz r7, 32(sp)
149 lwz r8, 36(sp)
150 lwz r9, 40(sp)
151 lwz r10, 44(sp)
152 lwz r11, 48(sp)
153 lwz r13, 52(sp)
154 lwz r14, 56(sp)
155 lwz r15, 60(sp)
156 lwz r16, 64(sp)
157 lwz r17, 68(sp)
158 lwz r18, 72(sp)
159 lwz r19, 76(sp)
160 lwz r20, 80(sp)
161 lwz r21, 84(sp)
162 lwz r22, 88(sp)
163 lwz r23, 92(sp)
164 lwz r24, 96(sp)
165 lwz r25, 100(sp)
166 lwz r26, 104(sp)
167 lwz r27, 108(sp)
168 lwz r28, 112(sp)
169 lwz r29, 116(sp)
170 lwz r30, 120(sp)
171 lwz r31, 124(sp)
172
173 lwz r12, 128(sp)
174 mtcr r12
175
176 lwz r12, 132(sp)
177 mtsrr0 r12
178
179 lwz r12, 136(sp)
180 mtsrr1 r12
181
182 lwz r12, 140(sp)
183 mtlr r12
184
185 lwz r12, 144(sp)
186 mtctr r12
187
188 lwz r12, 148(sp)
189 mtxer r12
190
191 lwz r12, 152(sp)
192 lwz sp, 156(sp)
193
194 rfi
195
196memsetb:
197 rlwimi r5, r5, 8, 16, 23
198 rlwimi r5, r5, 16, 0, 15
199
200 addi r14, r3, -4
201
202 cmplwi 0, r4, 4
203 blt 7f
204
205 stwu r5, 4(r14)
206 beqlr
207
208 andi. r15, r14, 3
209 add r4, r15, r4
210 subf r14, r15, r14
211 srwi r15, r4, 2
212 mtctr r15
213
214 bdz 6f
215
216 1:
217 stwu r5, 4(r14)
218 bdnz 1b
219
220 6:
221
222 andi. r4, r4, 3
223
224 7:
225
226 cmpwi 0, r4, 0
227 beqlr
228
229 mtctr r4
230 addi r6, r6, 3
231
232 8:
233
234 stbu r5, 1(r14)
235 bdnz 8b
236
237 blr
238
239memcpy:
240memcpy_from_uspace:
241memcpy_to_uspace:
242
243 srwi. r7, r5, 3
244 addi r6, r3, -4
245 addi r4, r4, -4
246 beq 2f
247
248 andi. r0, r6, 3
249 mtctr r7
250 bne 5f
251
252 1:
253
254 lwz r7, 4(r4)
255 lwzu r8, 8(r4)
256 stw r7, 4(r6)
257 stwu r8, 8(r6)
258 bdnz 1b
259
260 andi. r5, r5, 7
261
262 2:
263
264 cmplwi 0, r5, 4
265 blt 3f
266
267 lwzu r0, 4(r4)
268 addi r5, r5, -4
269 stwu r0, 4(r6)
270
271 3:
272
273 cmpwi 0, r5, 0
274 beqlr
275 mtctr r5
276 addi r4, r4, 3
277 addi r6, r6, 3
278
279 4:
280
281 lbzu r0, 1(r4)
282 stbu r0, 1(r6)
283 bdnz 4b
284 blr
285
286 5:
287
288 subfic r0, r0, 4
289 mtctr r0
290
291 6:
292
293 lbz r7, 4(r4)
294 addi r4, r4, 1
295 stb r7, 4(r6)
296 addi r6, r6, 1
297 bdnz 6b
298 subf r5, r0, r5
299 rlwinm. r7, r5, 32-3, 3, 31
300 beq 2b
301 mtctr r7
302 b 1b
303
304memcpy_from_uspace_failover_address:
305memcpy_to_uspace_failover_address:
306 b memcpy_from_uspace_failover_address
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