1 | #
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2 | # Copyright (C) 2006 Martin Decky
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3 | # All rights reserved.
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4 | #
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5 | # Redistribution and use in source and binary forms, with or without
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6 | # modification, are permitted provided that the following conditions
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7 | # are met:
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8 | #
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9 | # - Redistributions of source code must retain the above copyright
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10 | # notice, this list of conditions and the following disclaimer.
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11 | # - Redistributions in binary form must reproduce the above copyright
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12 | # notice, this list of conditions and the following disclaimer in the
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13 | # documentation and/or other materials provided with the distribution.
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14 | # - The name of the author may not be used to endorse or promote products
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15 | # derived from this software without specific prior written permission.
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16 | #
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17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | #
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28 |
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29 | #include "asm.h"
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30 | #include "regname.h"
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31 | #include "debug.inc"
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32 |
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33 | .text
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34 |
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35 | .global halt
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36 | .global memcpy
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37 | .global jump_to_kernel
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38 |
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39 | halt:
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40 | b halt
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41 |
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42 | memcpy:
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43 | srwi. r7, r5, 3
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44 | addi r6, r3, -4
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45 | addi r4, r4, -4
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46 | beq 2f
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47 |
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48 | andi. r0, r6, 3
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49 | mtctr r7
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50 | bne 5f
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51 |
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52 | 1:
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53 |
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54 | lwz r7, 4(r4)
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55 | lwzu r8, 8(r4)
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56 | stw r7, 4(r6)
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57 | stwu r8, 8(r6)
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58 | bdnz 1b
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59 |
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60 | andi. r5, r5, 7
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61 |
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62 | 2:
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63 |
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64 | cmplwi 0, r5, 4
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65 | blt 3f
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66 |
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67 | lwzu r0, 4(r4)
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68 | addi r5, r5, -4
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69 | stwu r0, 4(r6)
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70 |
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71 | 3:
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72 |
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73 | cmpwi 0, r5, 0
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74 | beqlr
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75 | mtctr r5
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76 | addi r4, r4, 3
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77 | addi r6, r6, 3
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78 |
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79 | 4:
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80 |
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81 | lbzu r0, 1(r4)
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82 | stbu r0, 1(r6)
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83 | bdnz 4b
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84 | blr
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85 |
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86 | 5:
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87 |
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88 | subfic r0, r0, 4
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89 | mtctr r0
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90 |
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91 | 6:
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92 |
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93 | lbz r7, 4(r4)
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94 | addi r4, r4, 1
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95 | stb r7, 4(r6)
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96 | addi r6, r6, 1
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97 | bdnz 6b
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98 | subf r5, r0, r5
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99 | rlwinm. r7, r5, 32-3, 3, 31
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100 | beq 2b
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101 | mtctr r7
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102 | b 1b
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103 |
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104 |
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105 | jump_to_kernel:
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106 |
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107 | # r3 = bootinfo (pa)
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108 | # r4 = bootinfo_size
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109 | # r5 = trans (pa)
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110 | # r6 = bytes to copy
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111 | # r7 = real_mode (pa)
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112 | # r8 = framebuffer (pa)
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113 | # r9 = scanline
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114 |
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115 | # disable interrupts
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116 |
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117 | mfmsr r31
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118 | rlwinm r31, r31, 0, 17, 15
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119 | mtmsr r31
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120 |
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121 | # set real_mode meeting point address
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122 |
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123 | mtspr srr0, r7
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124 |
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125 | # jumps to real_mode
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126 |
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127 | mfmsr r31
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128 | lis r30, ~0@h
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129 | ori r30, r30, ~(msr_ir | msr_dr | msr_ee)@l
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130 | and r31, r31, r30
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131 | mtspr srr1, r31
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132 |
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133 | sync
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134 | isync
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135 | rfi
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136 |
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137 | .section REALMODE, "ax"
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138 | .align PAGE_WIDTH
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139 | .global real_mode
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140 |
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141 | real_mode:
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142 |
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143 | DEBUG_INIT
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144 | DEBUG_real_mode
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145 |
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146 | # copy kernel to proper location
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147 | #
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148 | # r5 = trans (pa)
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149 | # r6 = bytes to copy
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150 | # r8 = framebuffer (pa)
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151 | # r9 = scanline
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152 |
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153 | li r31, PAGE_SIZE >> 2
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154 | li r30, 0
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155 |
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156 | page_copy:
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157 |
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158 | cmpwi r6, 0
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159 | beq copy_end
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160 |
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161 | # copy page
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162 |
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163 | mtctr r31
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164 | lwz r29, 0(r5)
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165 |
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166 | DEBUG_INIT
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167 | DEBUG_copy_loop
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168 |
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169 | copy_loop:
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170 |
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171 | lwz r28, 0(r29)
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172 | stw r28, 0(r30)
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173 |
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174 | addi r29, r29, 4
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175 | addi r30, r30, 4
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176 | subi r6, r6, 4
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177 |
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178 | cmpwi r6, 0
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179 | beq copy_end
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180 |
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181 | bdnz copy_loop
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182 |
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183 | DEBUG_end_copy_loop
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184 |
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185 | addi r5, r5, 4
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186 | b page_copy
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187 |
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188 | copy_end:
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189 |
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190 | DEBUG_segments
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191 |
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192 | # initially fill segment registers
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193 |
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194 | li r31, 16
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195 | mtctr r31
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196 | li r31, 0
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197 | li r30, 0x2000
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198 |
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199 | seg_fill:
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200 |
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201 | mtsrin r30, r31
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202 | addi r30, r30, 0x111
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203 | addis r31, r31, 0x1000 # move to next SR
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204 |
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205 | bdnz seg_fill
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206 |
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207 | # invalidate block address translation registers
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208 |
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209 | DEBUG_bat
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210 |
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211 | li r30, 0
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212 |
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213 | mtspr ibat0u, r30
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214 | mtspr ibat0l, r30
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215 |
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216 | mtspr ibat1u, r30
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217 | mtspr ibat1l, r30
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218 |
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219 | mtspr ibat2u, r30
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220 | mtspr ibat2l, r30
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221 |
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222 | mtspr ibat3u, r30
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223 | mtspr ibat3l, r30
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224 |
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225 | mtspr dbat0u, r30
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226 | mtspr dbat0l, r30
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227 |
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228 | mtspr dbat1u, r30
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229 | mtspr dbat1l, r30
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230 |
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231 | mtspr dbat2u, r30
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232 | mtspr dbat2l, r30
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233 |
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234 | mtspr dbat3u, r30
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235 | mtspr dbat3l, r30
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236 |
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237 | # create empty page hash table FIXME
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238 |
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239 | DEBUG_pht
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240 |
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241 | lis r31, 0x07ff
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242 | ori r31, r31, 0x0000
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243 |
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244 | mtsdr1 r31
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245 |
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246 | # create identity mapping
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247 |
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248 | DEBUG_mapping
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249 |
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250 | # FIXME: map exactly the size of RAM
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251 |
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252 | lis r31, 0x8000
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253 | ori r31, r31, 0x0ffe
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254 |
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255 | lis r30, 0x0000
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256 | ori r30, r30, 0x0002
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257 |
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258 | mtspr ibat0u, r31
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259 | mtspr ibat0l, r30
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260 |
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261 | mtspr dbat0u, r31
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262 | mtspr dbat0l, r30
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263 |
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264 | DEBUG_tlb
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265 |
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266 | tlbia
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267 | tlbsync
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268 |
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269 | DEBUG_prepare
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270 |
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271 | # start the kernel
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272 | #
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273 | # r3 = bootinfo (pa)
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274 |
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275 | lis r31, KERNEL_START_ADDR@ha
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276 | addi r31, r31, KERNEL_START_ADDR@l
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277 |
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278 | mtspr srr0, r31
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279 |
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280 | mfmsr r31
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281 | ori r31, r31, (msr_ir | msr_dr)@l
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282 | mtspr srr1, r31
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283 |
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284 | sync
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285 | isync
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286 |
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287 | DEBUG_rfi
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288 | rfi
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289 |
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290 | .align PAGE_WIDTH
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291 | .global trans
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292 | trans:
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293 | .space (TRANS_SIZE * TRANS_ITEM_SIZE)
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