1 | /*
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2 | * Copyright (C) 2003-2004 Jakub Jermar
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 |
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29 | #include <arch/mm/tlb.h>
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30 | #include <arch/mm/asid.h>
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31 | #include <mm/tlb.h>
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32 | #include <mm/page.h>
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33 | #include <mm/vm.h>
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34 | #include <arch/cp0.h>
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35 | #include <panic.h>
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36 | #include <arch.h>
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37 | #include <symtab.h>
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38 | #include <synch/spinlock.h>
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39 | #include <print.h>
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40 | #include <debug.h>
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41 |
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42 | static void tlb_refill_fail(struct exception_regdump *pstate);
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43 | static void tlb_invalid_fail(struct exception_regdump *pstate);
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44 | static void tlb_modified_fail(struct exception_regdump *pstate);
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45 |
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46 | static pte_t *find_mapping_and_check(__address badvaddr);
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47 |
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48 | static void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, int c, __address pfn);
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49 | static void prepare_entry_hi(entry_hi_t *hi, asid_t asid, __address addr);
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50 |
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51 | /** Initialize TLB
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52 | *
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53 | * Initialize TLB.
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54 | * Invalidate all entries and mark wired entries.
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55 | */
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56 | void tlb_init_arch(void)
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57 | {
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58 | int i;
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59 |
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60 | cp0_pagemask_write(TLB_PAGE_MASK_16K);
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61 | cp0_entry_hi_write(0);
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62 | cp0_entry_lo0_write(0);
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63 | cp0_entry_lo1_write(0);
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64 |
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65 | /*
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66 | * Invalidate all entries.
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67 | */
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68 | for (i = 0; i < TLB_SIZE; i++) {
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69 | cp0_index_write(i);
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70 | tlbwi();
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71 | }
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72 |
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73 | /*
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74 | * The kernel is going to make use of some wired
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75 | * entries (e.g. mapping kernel stacks in kseg3).
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76 | */
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77 | cp0_wired_write(TLB_WIRED);
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78 | }
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79 |
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80 | /** Process TLB Refill Exception
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81 | *
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82 | * Process TLB Refill Exception.
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83 | *
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84 | * @param pstate Interrupted register context.
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85 | */
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86 | void tlb_refill(struct exception_regdump *pstate)
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87 | {
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88 | entry_lo_t lo;
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89 | entry_hi_t hi;
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90 | __address badvaddr;
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91 | pte_t *pte;
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92 |
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93 | badvaddr = cp0_badvaddr_read();
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94 |
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95 | spinlock_lock(&VM->lock);
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96 |
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97 | pte = find_mapping_and_check(badvaddr);
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98 | if (!pte)
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99 | goto fail;
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100 |
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101 | /*
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102 | * Record access to PTE.
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103 | */
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104 | pte->a = 1;
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105 |
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106 | prepare_entry_hi(&hi, VM->asid, badvaddr);
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107 | prepare_entry_lo(&lo, pte->lo.g, pte->lo.v, pte->lo.d, pte->lo.c, pte->lo.pfn);
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108 |
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109 | /*
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110 | * New entry is to be inserted into TLB
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111 | */
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112 | cp0_entry_hi_write(hi.value);
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113 | if ((badvaddr/PAGE_SIZE) % 2 == 0) {
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114 | cp0_entry_lo0_write(lo.value);
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115 | cp0_entry_lo1_write(0);
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116 | }
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117 | else {
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118 | cp0_entry_lo0_write(0);
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119 | cp0_entry_lo1_write(lo.value);
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120 | }
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121 | tlbwr();
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122 |
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123 | spinlock_unlock(&VM->lock);
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124 | return;
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125 |
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126 | fail:
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127 | spinlock_unlock(&VM->lock);
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128 | tlb_refill_fail(pstate);
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129 | }
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130 |
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131 | /** Process TLB Invalid Exception
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132 | *
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133 | * Process TLB Invalid Exception.
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134 | *
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135 | * @param pstate Interrupted register context.
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136 | */
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137 | void tlb_invalid(struct exception_regdump *pstate)
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138 | {
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139 | tlb_index_t index;
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140 | __address badvaddr;
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141 | entry_lo_t lo;
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142 | entry_hi_t hi;
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143 | pte_t *pte;
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144 |
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145 | badvaddr = cp0_badvaddr_read();
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146 |
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147 | /*
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148 | * Locate the faulting entry in TLB.
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149 | */
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150 | hi.value = cp0_entry_hi_read();
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151 | prepare_entry_hi(&hi, hi.asid, badvaddr);
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152 | cp0_entry_hi_write(hi.value);
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153 | tlbp();
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154 | index.value = cp0_index_read();
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155 |
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156 | spinlock_lock(&VM->lock);
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157 |
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158 | /*
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159 | * Fail if the entry is not in TLB.
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160 | */
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161 | if (index.p) {
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162 | printf("TLB entry not found.\n");
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163 | goto fail;
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164 | }
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165 |
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166 | pte = find_mapping_and_check(badvaddr);
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167 | if (!pte)
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168 | goto fail;
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169 |
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170 | /*
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171 | * Read the faulting TLB entry.
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172 | */
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173 | tlbr();
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174 |
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175 | /*
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176 | * Record access to PTE.
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177 | */
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178 | pte->a = 1;
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179 |
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180 | prepare_entry_lo(&lo, pte->lo.g, pte->lo.v, pte->lo.d, pte->lo.c, pte->lo.pfn);
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181 |
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182 | /*
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183 | * The entry is to be updated in TLB.
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184 | */
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185 | if ((badvaddr/PAGE_SIZE) % 2 == 0)
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186 | cp0_entry_lo0_write(lo.value);
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187 | else
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188 | cp0_entry_lo1_write(lo.value);
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189 | tlbwi();
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190 |
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191 | spinlock_unlock(&VM->lock);
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192 | return;
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193 |
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194 | fail:
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195 | spinlock_unlock(&VM->lock);
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196 | tlb_invalid_fail(pstate);
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197 | }
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198 |
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199 | /** Process TLB Modified Exception
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200 | *
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201 | * Process TLB Modified Exception.
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202 | *
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203 | * @param pstate Interrupted register context.
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204 | */
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205 | void tlb_modified(struct exception_regdump *pstate)
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206 | {
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207 | tlb_index_t index;
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208 | __address badvaddr;
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209 | entry_lo_t lo;
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210 | entry_hi_t hi;
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211 | pte_t *pte;
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212 |
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213 | badvaddr = cp0_badvaddr_read();
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214 |
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215 | /*
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216 | * Locate the faulting entry in TLB.
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217 | */
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218 | hi.value = cp0_entry_hi_read();
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219 | prepare_entry_hi(&hi, hi.asid, badvaddr);
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220 | cp0_entry_hi_write(hi.value);
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221 | tlbp();
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222 | index.value = cp0_index_read();
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223 |
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224 | spinlock_lock(&VM->lock);
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225 |
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226 | /*
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227 | * Fail if the entry is not in TLB.
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228 | */
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229 | if (index.p) {
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230 | printf("TLB entry not found.\n");
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231 | goto fail;
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232 | }
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233 |
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234 | pte = find_mapping_and_check(badvaddr);
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235 | if (!pte)
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236 | goto fail;
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237 |
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238 | /*
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239 | * Fail if the page is not writable.
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240 | */
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241 | if (!pte->w)
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242 | goto fail;
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243 |
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244 | /*
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245 | * Read the faulting TLB entry.
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246 | */
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247 | tlbr();
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248 |
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249 | /*
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250 | * Record access and write to PTE.
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251 | */
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252 | pte->a = 1;
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253 | pte->lo.d = 1;
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254 |
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255 | prepare_entry_lo(&lo, pte->lo.g, pte->lo.v, pte->w, pte->lo.c, pte->lo.pfn);
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256 |
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257 | /*
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258 | * The entry is to be updated in TLB.
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259 | */
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260 | if ((badvaddr/PAGE_SIZE) % 2 == 0)
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261 | cp0_entry_lo0_write(lo.value);
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262 | else
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263 | cp0_entry_lo1_write(lo.value);
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264 | tlbwi();
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265 |
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266 | spinlock_unlock(&VM->lock);
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267 | return;
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268 |
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269 | fail:
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270 | spinlock_unlock(&VM->lock);
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271 | tlb_modified_fail(pstate);
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272 | }
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273 |
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274 | void tlb_refill_fail(struct exception_regdump *pstate)
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275 | {
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276 | char *symbol = "";
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277 | char *sym2 = "";
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278 |
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279 | char *s = get_symtab_entry(pstate->epc);
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280 | if (s)
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281 | symbol = s;
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282 | s = get_symtab_entry(pstate->ra);
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283 | if (s)
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284 | sym2 = s;
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285 | panic("%X: TLB Refill Exception at %X(%s<-%s)\n", cp0_badvaddr_read(), pstate->epc, symbol, sym2);
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286 | }
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287 |
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288 |
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289 | void tlb_invalid_fail(struct exception_regdump *pstate)
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290 | {
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291 | char *symbol = "";
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292 |
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293 | char *s = get_symtab_entry(pstate->epc);
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294 | if (s)
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295 | symbol = s;
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296 | panic("%X: TLB Invalid Exception at %X(%s)\n", cp0_badvaddr_read(), pstate->epc, symbol);
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297 | }
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298 |
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299 | void tlb_modified_fail(struct exception_regdump *pstate)
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300 | {
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301 | char *symbol = "";
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302 |
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303 | char *s = get_symtab_entry(pstate->epc);
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304 | if (s)
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305 | symbol = s;
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306 | panic("%X: TLB Modified Exception at %X(%s)\n", cp0_badvaddr_read(), pstate->epc, symbol);
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307 | }
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308 |
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309 | /** Invalidate TLB entries with specified ASID
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310 | *
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311 | * Invalidate TLB entries with specified ASID.
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312 | *
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313 | * @param asid ASID.
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314 | */
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315 | void tlb_invalidate(asid_t asid)
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316 | {
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317 | entry_hi_t hi;
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318 | ipl_t ipl;
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319 | int i;
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320 |
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321 | ASSERT(asid != ASID_INVALID);
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322 |
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323 | ipl = interrupts_disable();
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324 |
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325 | for (i = 0; i < TLB_SIZE; i++) {
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326 | cp0_index_write(i);
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327 | tlbr();
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328 |
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329 | hi.value = cp0_entry_hi_read();
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330 | if (hi.asid == asid) {
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331 | cp0_pagemask_write(TLB_PAGE_MASK_16K);
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332 | cp0_entry_hi_write(0);
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333 | cp0_entry_lo0_write(0);
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334 | cp0_entry_lo1_write(0);
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335 | tlbwi();
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336 | }
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337 | }
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338 |
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339 | interrupts_restore(ipl);
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340 | }
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341 |
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342 | /** Try to find PTE for faulting address
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343 | *
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344 | * Try to find PTE for faulting address.
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345 | * The VM->lock must be held on entry to this function.
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346 | *
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347 | * @param badvaddr Faulting virtual address.
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348 | *
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349 | * @return PTE on success, NULL otherwise.
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350 | */
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351 | pte_t *find_mapping_and_check(__address badvaddr)
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352 | {
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353 | entry_hi_t hi;
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354 | pte_t *pte;
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355 |
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356 | hi.value = cp0_entry_hi_read();
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357 |
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358 | /*
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359 | * Handler cannot succeed if the ASIDs don't match.
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360 | */
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361 | if (hi.asid != VM->asid) {
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362 | printf("EntryHi.asid=%d, VM->asid=%d\n", hi.asid, VM->asid);
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363 | return NULL;
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364 | }
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365 |
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366 | /*
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367 | * Handler cannot succeed if badvaddr has no mapping.
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368 | */
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369 | pte = find_mapping(badvaddr, 0);
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370 | if (!pte) {
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371 | printf("No such mapping.\n");
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372 | return NULL;
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373 | }
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374 |
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375 | /*
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376 | * Handler cannot succeed if the mapping is marked as invalid.
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377 | */
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378 | if (!pte->lo.v) {
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379 | printf("Invalid mapping.\n");
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380 | return NULL;
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381 | }
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382 |
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383 | return pte;
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384 | }
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385 |
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386 | void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, int c, __address pfn)
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387 | {
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388 | lo->value = 0;
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389 | lo->g = g;
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390 | lo->v = v;
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391 | lo->d = d;
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392 | lo->c = c;
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393 | lo->pfn = pfn;
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394 | }
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395 |
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396 | void prepare_entry_hi(entry_hi_t *hi, asid_t asid, __address addr)
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397 | {
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398 | hi->value = (((addr/PAGE_SIZE)/2)*PAGE_SIZE*2);
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399 | hi->asid = asid;
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400 | }
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