source: mainline/arch/mips32/src/fpu_context.c@ 25d7709

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 25d7709 was 25d7709, checked in by Jakub Jermar <jakub@…>, 19 years ago

Nicer ia32 interrupt handlers and structures holding interrupted context data.
Unify the name holding interrupted context data on all architectures to be istate.

  • Property mode set to 100644
File size: 2.0 KB
Line 
1/*
2 * Copyright (C) 2005 Jakub Vana
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 */
29
30#include <fpu_context.h>
31#include <arch.h>
32#include <arch/cp0.h>
33#include <proc/thread.h>
34
35void fpu_disable(void)
36{
37#ifdef ARCH_HAS_FPU
38 cp0_status_write(cp0_status_read() & ~cp0_status_fpu_bit);
39 if (THREAD && THREAD->istate)
40 THREAD->istate->status &= ~cp0_status_fpu_bit;
41#endif
42}
43
44void fpu_enable(void)
45{
46#ifdef ARCH_HAS_FPU
47 cp0_status_write(cp0_status_read() | cp0_status_fpu_bit);
48 if (THREAD && THREAD->istate)
49 THREAD->istate->status |= cp0_status_fpu_bit;
50#endif
51}
52
53void fpu_init()
54{
55 /* TODO: Zero all registers */
56}
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