source: mainline/arch/mips32/src/exception.c@ a0bb10ef

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since a0bb10ef was 53f9821, checked in by Ondrej Palkovsky <ondrap@…>, 19 years ago

Cleanup of spinlocks, now compiles both ia32 and amd64 with
and without DEBUG_SPINLOCKS. Made spinlocks inline.
Moved syscall_handler to generic (it was identical for ia32,amd64 & mips32).
Made slightly faster syscall for ia32.
Made better interrupt routines for ia32.
Allow not saving non-scratch registers during interrupt on ia32,amd64,mips32.
Aligned interrupt handlers on ia32,amd64, this should prevent problems
with different instruction lengths.

  • Property mode set to 100644
File size: 4.5 KB
Line 
1/*
2 * Copyright (C) 2003-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <arch/exception.h>
30#include <arch/interrupt.h>
31#include <panic.h>
32#include <arch/cp0.h>
33#include <arch/types.h>
34#include <arch.h>
35#include <debug.h>
36#include <proc/thread.h>
37#include <symtab.h>
38#include <print.h>
39#include <interrupt.h>
40#include <func.h>
41#include <console/kconsole.h>
42#include <arch/debugger.h>
43
44static char * exctable[] = {
45 "Interrupt","TLB Modified","TLB Invalid","TLB Invalid Store",
46 "Address Error - load/instr. fetch",
47 "Address Error - store",
48 "Bus Error - fetch instruction",
49 "Bus Error - data reference",
50 "Syscall",
51 "BreakPoint",
52 "Reserved Instruction",
53 "Coprocessor Unusable",
54 "Arithmetic Overflow",
55 "Trap",
56 "Virtual Coherency - instruction",
57 "Floating Point",
58 NULL, NULL, NULL, NULL, NULL, NULL, NULL,
59 "WatchHi/WatchLo", /* 23 */
60 NULL, NULL, NULL, NULL, NULL, NULL, NULL,
61 "Virtual Coherency - data",
62};
63
64static void print_regdump(istate_t *istate)
65{
66 char *pcsymbol = "";
67 char *rasymbol = "";
68
69 char *s = get_symtab_entry(istate->epc);
70 if (s)
71 pcsymbol = s;
72 s = get_symtab_entry(istate->ra);
73 if (s)
74 rasymbol = s;
75
76 printf("PC: %X(%s) RA: %X(%s), SP(%P)\n",istate->epc,pcsymbol,
77 istate->ra,rasymbol, istate->sp);
78}
79
80static void unhandled_exception(int n, istate_t *istate)
81{
82 print_regdump(istate);
83 panic("unhandled exception %s\n", exctable[n]);
84}
85
86static void breakpoint_exception(int n, istate_t *istate)
87{
88#ifdef CONFIG_DEBUG
89 debugger_bpoint(istate);
90#else
91 /* it is necessary to not re-execute BREAK instruction after
92 returning from Exception handler
93 (see page 138 in R4000 Manual for more information) */
94 istate->epc += 4;
95#endif
96}
97
98static void tlbmod_exception(int n, istate_t *istate)
99{
100 tlb_modified(istate);
101}
102
103static void tlbinv_exception(int n, istate_t *istate)
104{
105 tlb_invalid(istate);
106}
107
108#ifdef CONFIG_FPU_LAZY
109static void cpuns_exception(int n, istate_t *istate)
110{
111 if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id)
112 scheduler_fpu_lazy_request();
113 else
114 panic("unhandled Coprocessor Unusable Exception\n");
115}
116#endif
117
118static void interrupt_exception(int n, istate_t *istate)
119{
120 __u32 cause;
121 int i;
122
123 /* decode interrupt number and process the interrupt */
124 cause = (cp0_cause_read() >> 8) &0xff;
125
126 for (i = 0; i < 8; i++)
127 if (cause & (1 << i))
128 exc_dispatch(i+INT_OFFSET, istate);
129}
130
131/** Handle syscall userspace call */
132static void syscall_exception(int n, istate_t *istate)
133{
134 panic("Syscall is handled through shortcut");
135}
136
137void exception_init(void)
138{
139 int i;
140
141 /* Clear exception table */
142 for (i=0;i < IVT_ITEMS; i++)
143 exc_register(i, "undef", (iroutine) unhandled_exception);
144 exc_register(EXC_Bp, "bkpoint", (iroutine) breakpoint_exception);
145 exc_register(EXC_Mod, "tlb_mod", (iroutine) tlbmod_exception);
146 exc_register(EXC_TLBL, "tlbinvl", (iroutine) tlbinv_exception);
147 exc_register(EXC_TLBS, "tlbinvl", (iroutine) tlbinv_exception);
148 exc_register(EXC_Int, "interrupt", (iroutine) interrupt_exception);
149#ifdef CONFIG_FPU_LAZY
150 exc_register(EXC_CpU, "cpunus", (iroutine) cpuns_exception);
151#endif
152 exc_register(EXC_Sys, "syscall", (iroutine) syscall_exception);
153}
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