source: mainline/arch/mips32/src/exception.c@ 8060a24c

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 8060a24c was 874621f, checked in by Ondrej Palkovsky <ondrap@…>, 19 years ago

Added kernel circular buffer klog.
Added automatic killing of tasks raising inappropriate exceptions.
TODO Fix vsnprintf return value(and behaviour according to specs) and remove workaround in klog.

  • Property mode set to 100644
File size: 4.9 KB
RevLine 
[f761f1eb]1/*
[178ec7b]2 * Copyright (C) 2003-2004 Jakub Jermar
[f761f1eb]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <arch/exception.h>
[9c0a9b3]30#include <arch/interrupt.h>
[f761f1eb]31#include <panic.h>
32#include <arch/cp0.h>
33#include <arch/types.h>
34#include <arch.h>
[623ba26c]35#include <debug.h>
[1084a784]36#include <proc/thread.h>
[7a8c866a]37#include <symtab.h>
38#include <print.h>
39#include <interrupt.h>
[e07fe0c]40#include <func.h>
41#include <console/kconsole.h>
[5bb8e45]42#include <arch/debugger.h>
[7a8c866a]43
44static char * exctable[] = {
45 "Interrupt","TLB Modified","TLB Invalid","TLB Invalid Store",
46 "Address Error - load/instr. fetch",
47 "Address Error - store",
48 "Bus Error - fetch instruction",
49 "Bus Error - data reference",
50 "Syscall",
51 "BreakPoint",
52 "Reserved Instruction",
53 "Coprocessor Unusable",
54 "Arithmetic Overflow",
55 "Trap",
56 "Virtual Coherency - instruction",
57 "Floating Point",
58 NULL, NULL, NULL, NULL, NULL, NULL, NULL,
59 "WatchHi/WatchLo", /* 23 */
60 NULL, NULL, NULL, NULL, NULL, NULL, NULL,
61 "Virtual Coherency - data",
62};
63
[25d7709]64static void print_regdump(istate_t *istate)
[7a8c866a]65{
66 char *pcsymbol = "";
67 char *rasymbol = "";
68
[25d7709]69 char *s = get_symtab_entry(istate->epc);
[7a8c866a]70 if (s)
71 pcsymbol = s;
[25d7709]72 s = get_symtab_entry(istate->ra);
[7a8c866a]73 if (s)
74 rasymbol = s;
75
[cf85e24c]76 printf("PC: %#x(%s) RA: %#x(%s), SP(%p)\n", istate->epc, pcsymbol, istate->ra, rasymbol, istate->sp);
[7a8c866a]77}
78
[25d7709]79static void unhandled_exception(int n, istate_t *istate)
[7a8c866a]80{
[874621f]81 fault_if_from_uspace(istate, "unhandled exception %s", exctable[n]);
82
[25d7709]83 print_regdump(istate);
[7a8c866a]84 panic("unhandled exception %s\n", exctable[n]);
85}
86
[3b712407]87static void reserved_instr_exception(int n, istate_t *istate)
88{
89 if (*((__u32 *)istate->epc) == 0x7c03e83b) {
90 ASSERT(THREAD);
91 istate->epc += 4;
92 istate->v1 = istate->k1;
[5201199]93 } else
94 unhandled_exception(n, istate);
[3b712407]95}
96
[25d7709]97static void breakpoint_exception(int n, istate_t *istate)
[7a8c866a]98{
[5bb8e45]99#ifdef CONFIG_DEBUG
[25d7709]100 debugger_bpoint(istate);
[5bb8e45]101#else
[7a8c866a]102 /* it is necessary to not re-execute BREAK instruction after
103 returning from Exception handler
104 (see page 138 in R4000 Manual for more information) */
[25d7709]105 istate->epc += 4;
[5bb8e45]106#endif
[7a8c866a]107}
108
[25d7709]109static void tlbmod_exception(int n, istate_t *istate)
[7a8c866a]110{
[25d7709]111 tlb_modified(istate);
[7a8c866a]112}
113
[25d7709]114static void tlbinv_exception(int n, istate_t *istate)
[7a8c866a]115{
[25d7709]116 tlb_invalid(istate);
[7a8c866a]117}
118
[5a95b25]119#ifdef CONFIG_FPU_LAZY
[25d7709]120static void cpuns_exception(int n, istate_t *istate)
[7a8c866a]121{
122 if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id)
123 scheduler_fpu_lazy_request();
[874621f]124 else {
125 fault_if_from_uspace(istate, "unhandled Coprocessor Unusable Exception");
[7a8c866a]126 panic("unhandled Coprocessor Unusable Exception\n");
[874621f]127 }
[7a8c866a]128}
[5a95b25]129#endif
[7a8c866a]130
[25d7709]131static void interrupt_exception(int n, istate_t *istate)
[7a8c866a]132{
133 __u32 cause;
134 int i;
135
136 /* decode interrupt number and process the interrupt */
137 cause = (cp0_cause_read() >> 8) &0xff;
138
139 for (i = 0; i < 8; i++)
140 if (cause & (1 << i))
[25d7709]141 exc_dispatch(i+INT_OFFSET, istate);
[7a8c866a]142}
143
[1b109cb]144/** Handle syscall userspace call */
145static void syscall_exception(int n, istate_t *istate)
[f761f1eb]146{
[1b109cb]147 panic("Syscall is handled through shortcut");
[f761f1eb]148}
[7a8c866a]149
150void exception_init(void)
151{
152 int i;
153
154 /* Clear exception table */
155 for (i=0;i < IVT_ITEMS; i++)
[49a39c2]156 exc_register(i, "undef", (iroutine) unhandled_exception);
157 exc_register(EXC_Bp, "bkpoint", (iroutine) breakpoint_exception);
[3b712407]158 exc_register(EXC_RI, "resinstr", (iroutine) reserved_instr_exception);
[49a39c2]159 exc_register(EXC_Mod, "tlb_mod", (iroutine) tlbmod_exception);
160 exc_register(EXC_TLBL, "tlbinvl", (iroutine) tlbinv_exception);
161 exc_register(EXC_TLBS, "tlbinvl", (iroutine) tlbinv_exception);
162 exc_register(EXC_Int, "interrupt", (iroutine) interrupt_exception);
[7a8c866a]163#ifdef CONFIG_FPU_LAZY
[49a39c2]164 exc_register(EXC_CpU, "cpunus", (iroutine) cpuns_exception);
[7a8c866a]165#endif
[49a39c2]166 exc_register(EXC_Sys, "syscall", (iroutine) syscall_exception);
[7a8c866a]167}
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