[f761f1eb] | 1 | /*
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[178ec7b] | 2 | * Copyright (C) 2003-2004 Jakub Jermar
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[f761f1eb] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | #include <arch/exception.h>
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[9c0a9b3] | 30 | #include <arch/interrupt.h>
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[f761f1eb] | 31 | #include <panic.h>
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| 32 | #include <arch/cp0.h>
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| 33 | #include <arch/types.h>
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| 34 | #include <arch.h>
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[623ba26c] | 35 | #include <debug.h>
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[1084a784] | 36 | #include <proc/thread.h>
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[7a8c866a] | 37 | #include <symtab.h>
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| 38 | #include <print.h>
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| 39 | #include <interrupt.h>
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[e07fe0c] | 40 | #include <func.h>
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| 41 | #include <console/kconsole.h>
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[5bb8e45] | 42 | #include <arch/debugger.h>
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[7a8c866a] | 43 |
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| 44 | static char * exctable[] = {
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| 45 | "Interrupt","TLB Modified","TLB Invalid","TLB Invalid Store",
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| 46 | "Address Error - load/instr. fetch",
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| 47 | "Address Error - store",
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| 48 | "Bus Error - fetch instruction",
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| 49 | "Bus Error - data reference",
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| 50 | "Syscall",
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| 51 | "BreakPoint",
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| 52 | "Reserved Instruction",
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| 53 | "Coprocessor Unusable",
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| 54 | "Arithmetic Overflow",
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| 55 | "Trap",
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| 56 | "Virtual Coherency - instruction",
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| 57 | "Floating Point",
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| 58 | NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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| 59 | "WatchHi/WatchLo", /* 23 */
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| 60 | NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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| 61 | "Virtual Coherency - data",
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| 62 | };
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| 63 |
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[25d7709] | 64 | static void print_regdump(istate_t *istate)
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[7a8c866a] | 65 | {
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| 66 | char *pcsymbol = "";
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| 67 | char *rasymbol = "";
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| 68 |
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[25d7709] | 69 | char *s = get_symtab_entry(istate->epc);
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[7a8c866a] | 70 | if (s)
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| 71 | pcsymbol = s;
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[25d7709] | 72 | s = get_symtab_entry(istate->ra);
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[7a8c866a] | 73 | if (s)
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| 74 | rasymbol = s;
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| 75 |
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[cf85e24c] | 76 | printf("PC: %#x(%s) RA: %#x(%s), SP(%p)\n", istate->epc, pcsymbol, istate->ra, rasymbol, istate->sp);
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[7a8c866a] | 77 | }
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| 78 |
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[25d7709] | 79 | static void unhandled_exception(int n, istate_t *istate)
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[7a8c866a] | 80 | {
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[25d7709] | 81 | print_regdump(istate);
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[7a8c866a] | 82 | panic("unhandled exception %s\n", exctable[n]);
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| 83 | }
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| 84 |
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[3b712407] | 85 | static void reserved_instr_exception(int n, istate_t *istate)
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| 86 | {
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| 87 | if (*((__u32 *)istate->epc) == 0x7c03e83b) {
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| 88 | ASSERT(THREAD);
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| 89 | istate->epc += 4;
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| 90 | istate->v1 = istate->k1;
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[5201199] | 91 | } else
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| 92 | unhandled_exception(n, istate);
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[3b712407] | 93 | }
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| 94 |
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[25d7709] | 95 | static void breakpoint_exception(int n, istate_t *istate)
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[7a8c866a] | 96 | {
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[5bb8e45] | 97 | #ifdef CONFIG_DEBUG
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[25d7709] | 98 | debugger_bpoint(istate);
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[5bb8e45] | 99 | #else
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[7a8c866a] | 100 | /* it is necessary to not re-execute BREAK instruction after
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| 101 | returning from Exception handler
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| 102 | (see page 138 in R4000 Manual for more information) */
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[25d7709] | 103 | istate->epc += 4;
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[5bb8e45] | 104 | #endif
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[7a8c866a] | 105 | }
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| 106 |
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[25d7709] | 107 | static void tlbmod_exception(int n, istate_t *istate)
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[7a8c866a] | 108 | {
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[25d7709] | 109 | tlb_modified(istate);
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[7a8c866a] | 110 | }
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| 111 |
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[25d7709] | 112 | static void tlbinv_exception(int n, istate_t *istate)
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[7a8c866a] | 113 | {
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[25d7709] | 114 | tlb_invalid(istate);
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[7a8c866a] | 115 | }
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| 116 |
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[5a95b25] | 117 | #ifdef CONFIG_FPU_LAZY
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[25d7709] | 118 | static void cpuns_exception(int n, istate_t *istate)
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[7a8c866a] | 119 | {
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| 120 | if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id)
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| 121 | scheduler_fpu_lazy_request();
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| 122 | else
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| 123 | panic("unhandled Coprocessor Unusable Exception\n");
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| 124 | }
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[5a95b25] | 125 | #endif
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[7a8c866a] | 126 |
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[25d7709] | 127 | static void interrupt_exception(int n, istate_t *istate)
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[7a8c866a] | 128 | {
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| 129 | __u32 cause;
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| 130 | int i;
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| 131 |
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| 132 | /* decode interrupt number and process the interrupt */
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| 133 | cause = (cp0_cause_read() >> 8) &0xff;
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| 134 |
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| 135 | for (i = 0; i < 8; i++)
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| 136 | if (cause & (1 << i))
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[25d7709] | 137 | exc_dispatch(i+INT_OFFSET, istate);
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[7a8c866a] | 138 | }
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| 139 |
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[1b109cb] | 140 | /** Handle syscall userspace call */
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| 141 | static void syscall_exception(int n, istate_t *istate)
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[f761f1eb] | 142 | {
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[1b109cb] | 143 | panic("Syscall is handled through shortcut");
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[f761f1eb] | 144 | }
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[7a8c866a] | 145 |
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| 146 | void exception_init(void)
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| 147 | {
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| 148 | int i;
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| 149 |
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| 150 | /* Clear exception table */
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| 151 | for (i=0;i < IVT_ITEMS; i++)
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[49a39c2] | 152 | exc_register(i, "undef", (iroutine) unhandled_exception);
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| 153 | exc_register(EXC_Bp, "bkpoint", (iroutine) breakpoint_exception);
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[3b712407] | 154 | exc_register(EXC_RI, "resinstr", (iroutine) reserved_instr_exception);
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[49a39c2] | 155 | exc_register(EXC_Mod, "tlb_mod", (iroutine) tlbmod_exception);
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| 156 | exc_register(EXC_TLBL, "tlbinvl", (iroutine) tlbinv_exception);
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| 157 | exc_register(EXC_TLBS, "tlbinvl", (iroutine) tlbinv_exception);
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| 158 | exc_register(EXC_Int, "interrupt", (iroutine) interrupt_exception);
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[7a8c866a] | 159 | #ifdef CONFIG_FPU_LAZY
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[49a39c2] | 160 | exc_register(EXC_CpU, "cpunus", (iroutine) cpuns_exception);
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[7a8c866a] | 161 | #endif
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[49a39c2] | 162 | exc_register(EXC_Sys, "syscall", (iroutine) syscall_exception);
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[7a8c866a] | 163 | }
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