source: mainline/arch/mips32/include/exception.h@ 25d7709

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 25d7709 was 25d7709, checked in by Jakub Jermar <jakub@…>, 19 years ago

Nicer ia32 interrupt handlers and structures holding interrupted context data.
Unify the name holding interrupted context data on all architectures to be istate.

  • Property mode set to 100644
File size: 2.5 KB
RevLine 
[f761f1eb]1/*
[178ec7b]2 * Copyright (C) 2003-2004 Jakub Jermar
[f761f1eb]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[60780c5]29#ifndef __mips32_EXCEPTION_H__
30#define __mips32_EXCEPTION_H__
[f761f1eb]31
[60780c5]32#ifndef __mips32_TYPES_H__
[909c6e3]33# include <arch/types.h>
34#endif
35
[25d7709]36#include <typedefs.h>
37
[f761f1eb]38#define EXC_Int 0
[e41c47e]39#define EXC_Mod 1
[f761f1eb]40#define EXC_TLBL 2
41#define EXC_TLBS 3
[568337b]42#define EXC_AdEL 4
43#define EXC_AdES 5
44#define EXC_IBE 6
45#define EXC_DBE 7
46#define EXC_Sys 8
47#define EXC_Bp 9
48#define EXC_RI 10
49#define EXC_CpU 11
50#define EXC_Ov 12
51#define EXC_Tr 13
52#define EXC_VCEI 14
53#define EXC_FPE 15
54#define EXC_WATCH 23
55#define EXC_VCED 31
[f761f1eb]56
[25d7709]57struct istate {
[909c6e3]58 __u32 at;
59 __u32 v0;
60 __u32 v1;
61 __u32 a0;
62 __u32 a1;
63 __u32 a2;
64 __u32 a3;
65 __u32 t0;
66 __u32 t1;
67 __u32 t2;
68 __u32 t3;
69 __u32 t4;
70 __u32 t5;
71 __u32 t6;
72 __u32 t7;
73 __u32 s0;
74 __u32 s1;
75 __u32 s2;
76 __u32 s3;
77 __u32 s4;
78 __u32 s5;
79 __u32 s6;
80 __u32 s7;
81 __u32 t8;
82 __u32 t9;
83 __u32 gp;
84 __u32 sp;
85 __u32 s8;
86 __u32 ra;
87
88 __u32 lo;
89 __u32 hi;
90
91 __u32 status; /* cp0_status */
92 __u32 epc; /* cp0_epc */
93};
94
[25d7709]95extern void exception(istate_t *istate);
[ffc277e]96extern void tlb_refill_entry(void);
97extern void exception_entry(void);
98extern void cache_error_entry(void);
[7a8c866a]99extern void exception_init(void);
[f761f1eb]100#endif
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