source: mainline/arch/mips32/Makefile.inc@ 80d2bdb

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 80d2bdb was 5bb8e45, checked in by Ondrej Palkovsky <ondrap@…>, 20 years ago

Added support for mips breakpoints.
We have a kind of kernel debugger :-)
Breakpoints on JMP/Branch instructions are not supported and
they are reported after the breakpoint is fired and exited as
a BranchDelay exception. If we found a way, how to detect these
instructions, we would be able to support them as 'one-time' breakpoints.

  • Property mode set to 100644
File size: 3.6 KB
Line 
1#
2# Copyright (C) 2005 Martin Decky
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29## Toolchain configuration
30#
31
32BFD_ARCH = mips
33TARGET = mipsel-linux-gnu
34TOOLCHAIN_DIR = /usr/local/mipsel/bin
35
36## Make some default assumptions
37#
38
39ifndef MIPS_MACHINE
40 MIPS_MACHINE = msim
41endif
42
43KERNEL_LOAD_ADDRESS = 0x80100000
44INIT_ADDRESS = 0x80110000
45INIT_SIZE = 65536
46CFLAGS += -mno-abicalls -G 0 -fno-zero-initialized-in-bss
47DEFS += -DMACHINE=${MIPS_MACHINE} -DKERNEL_LOAD_ADDRESS=${KERNEL_LOAD_ADDRESS} -DINIT_ADDRESS=${INIT_ADDRESS} -DINIT_SIZE=${INIT_SIZE}
48
49## Accepted MACHINEs
50#
51
52ifeq ($(MIPS_MACHINE),indy)
53 # GCC 4.0.1 compiled for mipsEL has problems compiling in
54 # BigEndian mode with the swl/swr/lwl/lwr instructions.
55 # We have to compile it with mips-sgi-irix5 to get it right.
56
57 BFD_NAME = elf32-bigmips
58 BFD = ecoff-bigmips --impure
59 TARGET = mips-sgi-irix5
60 TOOLCHAIN_DIR = /usr/local/mips/bin
61 KERNEL_LOAD_ADDRESS = 0x88002000
62 CFLAGS += -EB -DBIG_ENDIAN -DHAVE_FPU -march=r4600
63endif
64ifeq ($(MIPS_MACHINE),lgxemul)
65 BFD_NAME=elf32-tradlittlemips
66 BFD = ecoff-littlemips
67 CFLAGS += -DHAVE_FPU -mips3
68endif
69ifeq ($(MIPS_MACHINE),bgxemul)
70 BFD_NAME=elf32-bigmips
71 BFD = ecoff-bigmips
72 TARGET = mips-sgi-irix5
73 TOOLCHAIN_DIR = /usr/local/mips/bin
74 CFLAGS += -EB -DBIG_ENDIAN -DHAVE_FPU -mips3
75endif
76ifeq ($(MIPS_MACHINE),simics)
77 # SIMICS 4kc emulation is broken, although for instructions
78 # that do not bother us
79
80 BFD_NAME = elf32-tradlittlemips
81 BFD = elf32-tradlittlemips
82 CFLAGS += -mhard-float -mips3 -DTLBCNT=16
83 TLBCNT = 16
84endif
85ifeq ($(MIPS_MACHINE),msim)
86 BFD_NAME = elf32-tradlittlemips
87 BFD = binary
88 CFLAGS += -mhard-float -mips3
89endif
90
91
92ARCH_SOURCES = \
93 arch/$(ARCH)/src/start.S \
94 arch/$(ARCH)/src/context.S \
95 arch/$(ARCH)/src/panic.S \
96 arch/$(ARCH)/src/mips32.c \
97 arch/$(ARCH)/src/dummy.S \
98 arch/$(ARCH)/src/console.c \
99 arch/$(ARCH)/src/asm.S \
100 arch/$(ARCH)/src/exception.c \
101 arch/$(ARCH)/src/interrupt.c \
102 arch/$(ARCH)/src/cache.c \
103 arch/$(ARCH)/src/debugger.c \
104 arch/$(ARCH)/src/cpu/cpu.c \
105 arch/$(ARCH)/src/mm/asid.c \
106 arch/$(ARCH)/src/mm/frame.c \
107 arch/$(ARCH)/src/mm/page.c \
108 arch/$(ARCH)/src/mm/tlb.c \
109 arch/$(ARCH)/src/mm/vm.c \
110 arch/$(ARCH)/src/fpu_context.c \
111 arch/$(ARCH)/src/fmath.c \
112 arch/$(ARCH)/src/drivers/arc.c \
113 arch/$(ARCH)/src/drivers/msim.c \
114 arch/$(ARCH)/src/drivers/serial.c
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