source: mainline/arch/mips/src/mips.c@ 178ec7b

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 178ec7b was 178ec7b, checked in by Jakub Jermar <jakub@…>, 20 years ago

Copyright notices changes.

  • Property mode set to 100644
File size: 2.6 KB
Line 
1/*
2 * Copyright (C) 2003-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <arch.h>
30#include <arch/cp0.h>
31#include <arch/exception.h>
32#include <arch/asm/regname.h>
33#include <arch/asm.h>
34#include <mm/vm.h>
35#include <userspace.h>
36
37void arch_pre_mm_init(void)
38{
39 /*
40 * Switch to BEV normal level so that exception vectors point to the kernel.
41 * Clear the error level.
42 */
43 cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit));
44
45 /*
46 * Unmask hardware clock interrupt.
47 */
48 cp0_status_write(cp0_status_read() | (1<<cp0_status_im7_shift));
49
50 /*
51 * Start hardware clock.
52 */
53 cp0_compare_write(cp0_compare_value);
54 cp0_count_write(0);
55}
56
57void arch_post_mm_init(void)
58{
59}
60
61void arch_late_init(void)
62{
63}
64
65void userspace(void)
66{
67 /* EXL=1, UM=1, IE=1 */
68 cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
69 cp0_status_um_bit |
70 cp0_status_ie_enabled_bit));
71
72 cp0_epc_write(UTEXT_ADDRESS);
73 userspace_asm(USTACK_ADDRESS+PAGE_SIZE);
74 while (1)
75 ;
76}
77
78/* Stack pointer saved when entering user mode */
79/* TODO: How do we do it on SMP system???? */
80__address supervisor_sp;
81
82void before_thread_runs_arch(void)
83{
84 supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
85}
86
87
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