[f761f1eb] | 1 | /*
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| 2 | * Copyright (C) 2001-2004 Jakub Jermar
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | #include <arch.h>
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| 30 | #include <arch/cp0.h>
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| 31 | #include <arch/exception.h>
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| 32 |
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[f07bba5] | 33 | void arch_pre_mm_init(void)
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[f761f1eb] | 34 | {
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| 35 | /*
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| 36 | * Switch to BEV normal level so that exception vectors point to the kernel.
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| 37 | * Clear the error level.
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| 38 | */
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| 39 | cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit));
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[76cec1e] | 40 |
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[f761f1eb] | 41 | /*
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| 42 | * Unmask hardware clock interrupt.
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| 43 | */
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| 44 | cp0_status_write(cp0_status_read() | (1<<cp0_status_im7_shift));
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[76cec1e] | 45 |
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[f761f1eb] | 46 | /*
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| 47 | * Start hardware clock.
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| 48 | */
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| 49 | cp0_compare_write(cp0_compare_value);
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| 50 | cp0_count_write(0);
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| 51 | }
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[7eade45] | 52 |
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| 53 | void arch_post_mm_init(void)
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| 54 | {
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| 55 | }
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[babcb148] | 56 |
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| 57 | void arch_late_init(void)
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| 58 | {
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| 59 | }
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