| [f761f1eb] | 1 | /*
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| 2 | * Copyright (C) 2001-2004 Jakub Jermar
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | #include <arch/exception.h>
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| [9c0a9b3] | 30 | #include <arch/interrupt.h>
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| [f761f1eb] | 31 | #include <panic.h>
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| 32 | #include <arch/cp0.h>
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| 33 | #include <arch/types.h>
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| 34 | #include <arch.h>
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| [623ba26c] | 35 | #include <debug.h>
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| [f761f1eb] | 36 |
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| 37 | void exception(void)
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| 38 | {
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| 39 | int excno;
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| 40 | __u32 epc;
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| [568337b] | 41 | __u32 epc_shift = 0;
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| [f761f1eb] | 42 | pri_t pri;
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| [3e1607f] | 43 |
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| [623ba26c] | 44 | ASSERT(CPU != NULL);
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| 45 |
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| [3e1607f] | 46 | /*
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| 47 | * NOTE ON OPERATION ORDERING
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| 48 | *
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| 49 | * On entry, cpu_priority_high() must be called before exception bit is cleared.
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| 50 | * On exit, exception bit must be set before cpu_priority_restore() is called.
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| 51 | */
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| 52 |
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| [f761f1eb] | 53 | pri = cpu_priority_high();
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| 54 | epc = cp0_epc_read();
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| 55 | cp0_status_write(cp0_status_read() & ~ cp0_status_exl_exception_bit);
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| 56 |
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| [43114c5] | 57 | if (THREAD) {
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| 58 | THREAD->saved_pri = pri;
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| 59 | THREAD->saved_epc = epc;
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| [f761f1eb] | 60 | }
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| 61 | /* decode exception number and process the exception */
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| [568337b] | 62 | switch (excno = (cp0_cause_read() >> 2) & 0x1f) {
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| 63 | case EXC_Int:
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| 64 | interrupt();
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| 65 | break;
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| [f761f1eb] | 66 | case EXC_TLBL:
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| [568337b] | 67 | case EXC_TLBS:
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| 68 | tlb_invalid();
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| 69 | break;
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| 70 | case EXC_Mod:
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| 71 | panic("unhandled TLB Modification Exception\n");
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| 72 | break;
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| 73 | case EXC_AdEL:
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| 74 | panic("unhandled Address Error Exception - load or instruction fetch\n");
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| 75 | break;
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| 76 | case EXC_AdES:
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| 77 | panic("unhandled Address Error Exception - store\n");
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| 78 | break;
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| 79 | case EXC_IBE:
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| 80 | panic("unhandled Bus Error Exception - fetch instruction\n");
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| 81 | break;
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| 82 | case EXC_DBE:
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| 83 | panic("unhandled Bus Error Exception - data reference: load or store\n");
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| 84 | break;
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| 85 | case EXC_Bp:
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| 86 | /* it is necessary to not re-execute BREAK instruction after returning from Exception handler
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| 87 | (see page 138 in R4000 Manual for more information) */
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| 88 | epc_shift = 4;
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| 89 | break;
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| 90 | case EXC_RI:
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| 91 | panic("unhandled Reserved Instruction Exception\n");
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| 92 | break;
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| 93 | case EXC_CpU:
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| 94 | panic("unhandled Coprocessor Unusable Exception\n");
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| 95 | break;
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| 96 | case EXC_Ov:
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| 97 | panic("unhandled Arithmetic Overflow Exception\n");
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| 98 | break;
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| 99 | case EXC_Tr:
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| 100 | panic("unhandled Trap Exception\n");
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| 101 | break;
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| 102 | case EXC_VCEI:
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| 103 | panic("unhandled Virtual Coherency Exception - instruction\n");
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| 104 | break;
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| 105 | case EXC_FPE:
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| 106 | panic("unhandled Floating-Point Exception\n");
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| 107 | break;
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| 108 | case EXC_WATCH:
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| 109 | panic("unhandled reference to WatchHi/WatchLo address\n");
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| 110 | break;
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| 111 | case EXC_VCED:
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| 112 | panic("unhandled Virtual Coherency Exception - data\n");
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| 113 | break;
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| 114 | default:
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| 115 | panic("unhandled exception %d\n", excno);
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| [f761f1eb] | 116 | }
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| 117 |
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| [43114c5] | 118 | if (THREAD) {
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| 119 | pri = THREAD->saved_pri;
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| 120 | epc = THREAD->saved_epc;
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| [f761f1eb] | 121 | }
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| 122 |
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| [568337b] | 123 | cp0_epc_write(epc + epc_shift);
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| [f761f1eb] | 124 | cp0_status_write(cp0_status_read() | cp0_status_exl_exception_bit);
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| 125 | cpu_priority_restore(pri);
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| 126 | }
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