source: mainline/arch/ia64/src/start.S@ 69a03b9

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 69a03b9 was 802bb95, checked in by Jakub Jermar <jakub@…>, 20 years ago

ia64 work.
Comment some offending steps of heavyweight interrupt handler regarding RSE switching.
With this change, ia64 will do well on tests rwlock #4 and thread #1.
Cleanup.

  • Property mode set to 100644
File size: 2.3 KB
Line 
1#
2# Copyright (C) 2005 Jakub Jermar
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29#include <arch/register.h>
30
31.section K_TEXT_START
32
33.global kernel_image_start
34
35stack0:
36kernel_image_start:
37 .auto
38
39 # initialize PSR
40 mov psr.l = r0
41 srlz.i
42 srlz.d
43 ssm PSR_IC_MASK
44 srlz.d
45
46 # switch to register bank 1
47 bsw.1
48
49 # initialize register stack
50 mov ar.rsc = r0
51 mov ar.bspstore = r0
52 loadrs
53
54 .explicit
55 # initialize memory stack to some sane value
56 movl r12 = stack0 ;;
57 add r12 = - 16, r12 /* allocate a scratch area on the stack */
58
59 # initialize gp (Global Pointer) register
60 movl r1 = _hardcoded_load_address
61
62 ;;
63
64 #
65 # Initialize hardcoded_* variables.
66 #
67 movl r14 = _hardcoded_ktext_size
68 movl r15 = _hardcoded_kdata_size
69 movl r16 = _hardcoded_load_address
70 addl r17 = @gprel(hardcoded_ktext_size), gp
71 addl r18 = @gprel(hardcoded_kdata_size), gp
72 addl r19 = @gprel(hardcoded_load_address), gp
73 ;;
74 st4 [r17] = r14
75 st4 [r18] = r15
76 st8 [r19] = r16
77
78 br.call.sptk.many b0=main_bsp
79
800:
81 br 0b
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