source: mainline/arch/ia64/src/interrupt_handler.c@ df91be5

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since df91be5 was 1e2aecca, checked in by Jakub Jermar <jakub@…>, 20 years ago

IA-64 work.
Map interrupt vectors to their names.
  • Property mode set to 100644
File size: 5.0 KB
Line 
1/*
2 * Copyright (C) 2005 Jakub Vana
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 */
29
30#include <panic.h>
31#include <print.h>
32#include <arch/types.h>
33#include <arch/asm.h>
34#include <symtab.h>
35#include <debug.h>
36
37#define VECTORS_64_BUNDLE 20
38#define VECTORS_16_BUNDLE 48
39#define VECTORS_16_BUNDLE_START 0x5000
40#define VECTOR_MAX 0x7f00
41
42#define BUNDLE_SIZE 16
43
44extern __u64 REG_DUMP;
45
46char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {
47 "VHPT Translation vector",
48 "Instruction TLB vector",
49 "Data TLB vector",
50 "Alternate Instruction TLB vector",
51 "Alternate Data TLB vector",
52 "Data Nested TLB vector",
53 "Instruction Key Miss vector",
54 "Data Key Miss vector",
55 "Dirty-Bit vector",
56 "Instruction Access-Bit vector",
57 "Data Access-Bit vector"
58 "Break Instruction vector",
59 "External Interrupt vector"
60 "Reserved",
61 "Reserved",
62 "Reserved",
63 "Reserved",
64 "Reserved",
65 "Reserved",
66 "Reserved"
67};
68
69char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {
70 "Page Not Present vector",
71 "Key Permission vector",
72 "Instruction Access rights vector",
73 "Data Access Rights vector",
74 "General Exception vector",
75 "Disabled FP-Register vector",
76 "NaT Consumption vector",
77 "Speculation vector",
78 "Reserved",
79 "Debug vector",
80 "Unaligned Reference vector",
81 "Unsupported Data Reference vector",
82 "Floating-point Fault vector",
83 "Floating-point Trap vector",
84 "Lower-Privilege Transfer Trap vector",
85 "Taken Branch Trap vector",
86 "Single STep Trap vector",
87 "Reserved",
88 "Reserved",
89 "Reserved",
90 "Reserved",
91 "Reserved",
92 "Reserved",
93 "Reserved",
94 "Reserved",
95 "IA-32 Exception vector",
96 "IA-32 Intercept vector",
97 "IA-32 Interrupt vector",
98 "Reserved",
99 "Reserved",
100 "Reserved"
101};
102
103static char *vector_to_string(__u16 vector);
104
105char *vector_to_string(__u16 vector)
106{
107 ASSERT(vector <= VECTOR_MAX);
108
109 if (vector >= VECTORS_16_BUNDLE_START)
110 return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];
111 else
112 return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];
113}
114
115
116void general_exception(void);
117void general_exception(void)
118{
119 panic("\nGeneral Exception\n");
120}
121
122
123
124void break_instruction(void);
125void break_instruction(void)
126{
127 panic("\nBreak Instruction\n");
128}
129
130#define cr_dump(r) {__u64 val; get_control_register(r,val); printf("\ncr"#r":%Q",val);}
131#define ar_dump(r) {__u64 val; get_aplication_register(r,val); printf("\nar"#r":%Q",val);}
132
133void universal_handler(void);
134void universal_handler(void)
135{
136 __u64 vector,psr,PC;
137 __u64 *p;
138 int i;
139 char *sym;
140
141 get_shadow_register(16,vector);
142
143 p=&REG_DUMP;
144
145 for(i=0;i<128;i+=2) printf("gr%d:%Q\tgr%d:%Q\n",i,p[i],i+1,p[i+1]);
146
147 cr_dump(0);
148 cr_dump(1);
149 cr_dump(2);
150 cr_dump(8);
151 cr_dump(16);
152 cr_dump(17);
153 cr_dump(19);get_control_register(19,PC); if(sym=get_symtab_entry(PC)) printf("(%s)",sym);
154 cr_dump(20);get_control_register(20,PC); if(sym=get_symtab_entry(PC)) printf("(%s)",sym);
155 cr_dump(21);
156 cr_dump(22);get_control_register(22,PC); if(sym=get_symtab_entry(PC)) printf("(%s)",sym);
157 cr_dump(23);
158 cr_dump(24);
159 cr_dump(25);
160 cr_dump(64);
161 cr_dump(65);
162 cr_dump(66);
163 cr_dump(67);
164 cr_dump(68);
165 cr_dump(69);
166 cr_dump(70);
167 cr_dump(71);
168 cr_dump(72);
169 cr_dump(73);
170 cr_dump(74);
171 cr_dump(80);
172 cr_dump(81);
173
174 ar_dump(0);
175 ar_dump(1);
176 ar_dump(2);
177 ar_dump(3);
178 ar_dump(4);
179 ar_dump(5);
180 ar_dump(6);
181 ar_dump(7);
182 ar_dump(16);
183 ar_dump(17);
184 ar_dump(18);
185 ar_dump(19);
186 ar_dump(21);
187 ar_dump(24);
188 ar_dump(25);
189 ar_dump(26);
190 ar_dump(27);
191 ar_dump(28);
192 ar_dump(29);
193 ar_dump(30);
194 ar_dump(32);
195 ar_dump(36);
196 ar_dump(40);
197 ar_dump(44);
198 ar_dump(64);
199 ar_dump(65);
200 ar_dump(66);
201
202 get_psr(psr);
203
204 printf("\nPSR:%Q\n",psr);
205
206 panic("\nException:%W (%s)\n", (__u16) vector, vector_to_string(vector));
207}
208
209
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