source: mainline/arch/ia64/src/interrupt.c@ 31e8ddd

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 31e8ddd was d0c5901, checked in by Jakub Vana <jakub.vana@…>, 19 years ago

IA64 uspace keyboard kernel part
  • Property mode set to 100644
File size: 6.7 KB
Line 
1/*
2 * Copyright (C) 2005 Jakub Jermar
3 * Copyright (C) 2005 Jakub Vana
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 */
30
31#include <arch/interrupt.h>
32#include <panic.h>
33#include <print.h>
34#include <console/console.h>
35#include <arch/types.h>
36#include <arch/asm.h>
37#include <arch/barrier.h>
38#include <arch/register.h>
39#include <arch/drivers/it.h>
40#include <arch.h>
41#include <symtab.h>
42#include <debug.h>
43#include <syscall/syscall.h>
44#include <print.h>
45#include <proc/scheduler.h>
46#include <ipc/sysipc.h>
47#include <ipc/irq.h>
48#include <ipc/ipc.h>
49
50
51#define VECTORS_64_BUNDLE 20
52#define VECTORS_16_BUNDLE 48
53#define VECTORS_16_BUNDLE_START 0x5000
54#define VECTOR_MAX 0x7f00
55
56#define BUNDLE_SIZE 16
57
58
59char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {
60 "VHPT Translation vector",
61 "Instruction TLB vector",
62 "Data TLB vector",
63 "Alternate Instruction TLB vector",
64 "Alternate Data TLB vector",
65 "Data Nested TLB vector",
66 "Instruction Key Miss vector",
67 "Data Key Miss vector",
68 "Dirty-Bit vector",
69 "Instruction Access-Bit vector",
70 "Data Access-Bit vector"
71 "Break Instruction vector",
72 "External Interrupt vector"
73 "Reserved",
74 "Reserved",
75 "Reserved",
76 "Reserved",
77 "Reserved",
78 "Reserved",
79 "Reserved"
80};
81
82char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {
83 "Page Not Present vector",
84 "Key Permission vector",
85 "Instruction Access rights vector",
86 "Data Access Rights vector",
87 "General Exception vector",
88 "Disabled FP-Register vector",
89 "NaT Consumption vector",
90 "Speculation vector",
91 "Reserved",
92 "Debug vector",
93 "Unaligned Reference vector",
94 "Unsupported Data Reference vector",
95 "Floating-point Fault vector",
96 "Floating-point Trap vector",
97 "Lower-Privilege Transfer Trap vector",
98 "Taken Branch Trap vector",
99 "Single STep Trap vector",
100 "Reserved",
101 "Reserved",
102 "Reserved",
103 "Reserved",
104 "Reserved",
105 "Reserved",
106 "Reserved",
107 "Reserved",
108 "IA-32 Exception vector",
109 "IA-32 Intercept vector",
110 "IA-32 Interrupt vector",
111 "Reserved",
112 "Reserved",
113 "Reserved"
114};
115
116static char *vector_to_string(__u16 vector);
117static void dump_interrupted_context(istate_t *istate);
118
119char *vector_to_string(__u16 vector)
120{
121 ASSERT(vector <= VECTOR_MAX);
122
123 if (vector >= VECTORS_16_BUNDLE_START)
124 return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];
125 else
126 return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];
127}
128
129void dump_interrupted_context(istate_t *istate)
130{
131 char *ifa, *iipa, *iip;
132
133 ifa = get_symtab_entry(istate->cr_ifa);
134 iipa = get_symtab_entry(istate->cr_iipa);
135 iip = get_symtab_entry(istate->cr_iip);
136
137 putchar('\n');
138 printf("Interrupted context dump:\n");
139 printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp, istate->ar_bspstore);
140 printf("ar.rnat=%#018llx\tar.rsc=%#018llx\n", istate->ar_rnat, istate->ar_rsc);
141 printf("ar.ifs=%#018llx\tar.pfs=%#018llx\n", istate->ar_ifs, istate->ar_pfs);
142 printf("cr.isr=%#018llx\tcr.ipsr=%#018llx\t\n", istate->cr_isr.value, istate->cr_ipsr);
143
144 printf("cr.iip=%#018llx, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei, iip);
145 printf("cr.iipa=%#018llx\t(%s)\n", istate->cr_iipa, iipa);
146 printf("cr.ifa=%#018llx\t(%s)\n", istate->cr_ifa, ifa);
147}
148
149void general_exception(__u64 vector, istate_t *istate)
150{
151 char *desc = "";
152
153 dump_interrupted_context(istate);
154
155 switch (istate->cr_isr.ge_code) {
156 case GE_ILLEGALOP:
157 desc = "Illegal Operation fault";
158 break;
159 case GE_PRIVOP:
160 desc = "Privileged Operation fault";
161 break;
162 case GE_PRIVREG:
163 desc = "Privileged Register fault";
164 break;
165 case GE_RESREGFLD:
166 desc = "Reserved Register/Field fault";
167 break;
168 case GE_DISBLDISTRAN:
169 desc = "Disabled Instruction Set Transition fault";
170 break;
171 case GE_ILLEGALDEP:
172 desc = "Illegal Dependency fault";
173 break;
174 default:
175 desc = "unknown";
176 break;
177 }
178
179 panic("General Exception (%s)\n", desc);
180}
181
182void fpu_enable(void);
183
184void disabled_fp_register(__u64 vector, istate_t *istate)
185{
186#ifdef CONFIG_FPU_LAZY
187 scheduler_fpu_lazy_request();
188#else
189 dump_interrupted_context(istate);
190 panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));
191#endif
192}
193
194
195void nop_handler(__u64 vector, istate_t *istate)
196{
197}
198
199
200
201/** Handle syscall. */
202int break_instruction(__u64 vector, istate_t *istate)
203{
204 /*
205 * Move to next instruction after BREAK.
206 */
207 if (istate->cr_ipsr.ri == 2) {
208 istate->cr_ipsr.ri = 0;
209 istate->cr_iip += 16;
210 } else {
211 istate->cr_ipsr.ri++;
212 }
213
214 if (istate->in4 < SYSCALL_END)
215 return syscall_table[istate->in4](istate->in0, istate->in1, istate->in2, istate->in3);
216 else
217 panic("Undefined syscall %d", istate->in4);
218
219 return -1;
220}
221
222void universal_handler(__u64 vector, istate_t *istate)
223{
224 dump_interrupted_context(istate);
225 panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));
226}
227
228void external_interrupt(__u64 vector, istate_t *istate)
229{
230 cr_ivr_t ivr;
231
232 ivr.value = ivr_read();
233 srlz_d();
234
235 switch(ivr.vector) {
236 case INTERRUPT_TIMER:
237 it_interrupt();
238 break;
239 case INTERRUPT_SPURIOUS:
240 printf("cpu%d: spurious interrupt\n", CPU->id);
241 break;
242 default:
243 panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);
244 break;
245 }
246}
247
248void virtual_interrupt(__u64 irq,void *param)
249{
250 switch(irq) {
251 case IRQ_KBD:
252 if(kbd_uspace) ipc_irq_send_notif(irq);
253 break;
254 default:
255 panic("\nUnhandled Virtual Interrupt request %d\n", irq);
256 break;
257 }
258}
259
260/* Reregister irq to be IPC-ready */
261void irq_ipc_bind_arch(__native irq)
262{
263 if(irq==IRQ_KBD) {
264 kbd_uspace=1;
265 return;
266 }
267 panic("not implemented\n");
268 /* TODO */
269}
270
271
272
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