source: mainline/arch/ia64/src/interrupt.c@ 36b01bb2

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 36b01bb2 was 72f5866d, checked in by Jakub Jermar <jakub@…>, 20 years ago

Fix IA-64 so that it compiles again.
Characters are not recognised correctly.

  • Property mode set to 100644
File size: 5.7 KB
RevLine 
[dbd1059]1/*
2 * Copyright (C) 2005 Jakub Jermar
[e2ec980f]3 * Copyright (C) 2005 Jakub Vana
[dbd1059]4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 */
30
31#include <arch/interrupt.h>
32#include <panic.h>
[05d9dd89]33#include <print.h>
[72f5866d]34#include <console/console.h>
[dbd1059]35#include <arch/types.h>
36#include <arch/asm.h>
37#include <arch/barrier.h>
[0259524]38#include <arch/register.h>
[154049e]39#include <arch/drivers/it.h>
[05d9dd89]40#include <arch.h>
[e2ec980f]41#include <symtab.h>
42#include <debug.h>
[dbd1059]43
[e2ec980f]44#define VECTORS_64_BUNDLE 20
45#define VECTORS_16_BUNDLE 48
46#define VECTORS_16_BUNDLE_START 0x5000
47#define VECTOR_MAX 0x7f00
48
49#define BUNDLE_SIZE 16
50
51char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {
52 "VHPT Translation vector",
53 "Instruction TLB vector",
54 "Data TLB vector",
55 "Alternate Instruction TLB vector",
56 "Alternate Data TLB vector",
57 "Data Nested TLB vector",
58 "Instruction Key Miss vector",
59 "Data Key Miss vector",
60 "Dirty-Bit vector",
61 "Instruction Access-Bit vector",
62 "Data Access-Bit vector"
63 "Break Instruction vector",
64 "External Interrupt vector"
65 "Reserved",
66 "Reserved",
67 "Reserved",
68 "Reserved",
69 "Reserved",
70 "Reserved",
71 "Reserved"
72};
73
74char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {
75 "Page Not Present vector",
76 "Key Permission vector",
77 "Instruction Access rights vector",
78 "Data Access Rights vector",
79 "General Exception vector",
80 "Disabled FP-Register vector",
81 "NaT Consumption vector",
82 "Speculation vector",
83 "Reserved",
84 "Debug vector",
85 "Unaligned Reference vector",
86 "Unsupported Data Reference vector",
87 "Floating-point Fault vector",
88 "Floating-point Trap vector",
89 "Lower-Privilege Transfer Trap vector",
90 "Taken Branch Trap vector",
91 "Single STep Trap vector",
92 "Reserved",
93 "Reserved",
94 "Reserved",
95 "Reserved",
96 "Reserved",
97 "Reserved",
98 "Reserved",
99 "Reserved",
100 "IA-32 Exception vector",
101 "IA-32 Intercept vector",
102 "IA-32 Interrupt vector",
103 "Reserved",
104 "Reserved",
105 "Reserved"
106};
107
108static char *vector_to_string(__u16 vector);
[2ccd275]109static void dump_interrupted_context(struct exception_regdump *pstate);
[e2ec980f]110
111char *vector_to_string(__u16 vector)
112{
113 ASSERT(vector <= VECTOR_MAX);
114
115 if (vector >= VECTORS_16_BUNDLE_START)
116 return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];
117 else
118 return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];
119}
120
[2ccd275]121void dump_interrupted_context(struct exception_regdump *pstate)
[e2ec980f]122{
123 char *ifa, *iipa, *iip;
124
125 ifa = get_symtab_entry(pstate->cr_ifa);
126 iipa = get_symtab_entry(pstate->cr_iipa);
127 iip = get_symtab_entry(pstate->cr_iip);
128
129 putchar('\n');
[2ccd275]130 printf("Interrupted context dump:\n");
[e2ec980f]131 printf("ar.bsp=%P\tar.bspstore=%P\n", pstate->ar_bsp, pstate->ar_bspstore);
132 printf("ar.rnat=%Q\tar.rsc=%Q\n", pstate->ar_rnat, pstate->ar_rsc);
133 printf("ar.ifs=%Q\tar.pfs=%Q\n", pstate->ar_ifs, pstate->ar_pfs);
[2ccd275]134 printf("cr.isr=%Q\tcr.ips=%Q\t\n", pstate->cr_isr.value, pstate->cr_ips);
[e2ec980f]135
[2ccd275]136 printf("cr.iip=%Q, #%d\t(%s)\n", pstate->cr_iip, pstate->cr_isr.ei ,iip ? iip : "?");
137 printf("cr.iipa=%Q\t(%s)\n", pstate->cr_iipa, iipa ? iipa : "?");
138 printf("cr.ifa=%Q\t(%s)\n", pstate->cr_ifa, ifa ? ifa : "?");
[e2ec980f]139}
140
141void general_exception(__u64 vector, struct exception_regdump *pstate)
142{
[2ccd275]143 char *desc = "";
144
145 dump_interrupted_context(pstate);
146
147 switch (pstate->cr_isr.ge_code) {
148 case GE_ILLEGALOP:
149 desc = "Illegal Operation fault";
150 break;
151 case GE_PRIVOP:
152 desc = "Privileged Operation fault";
153 break;
154 case GE_PRIVREG:
155 desc = "Privileged Register fault";
156 break;
157 case GE_RESREGFLD:
158 desc = "Reserved Register/Field fault";
159 break;
160 case GE_DISBLDISTRAN:
161 desc = "Disabled Instruction Set Transition fault";
162 break;
163 case GE_ILLEGALDEP:
164 desc = "Illegal Dependency fault";
165 break;
166 default:
167 desc = "unknown";
168 break;
169 }
170
171 panic("General Exception (%s)\n", desc);
[e2ec980f]172}
173
174void break_instruction(__u64 vector, struct exception_regdump *pstate)
175{
[2ccd275]176 dump_interrupted_context(pstate);
[e2ec980f]177 panic("Break Instruction\n");
178}
179
180void universal_handler(__u64 vector, struct exception_regdump *pstate)
181{
[2ccd275]182 dump_interrupted_context(pstate);
[e2ec980f]183 panic("Interruption: %W (%s)\n", (__u16) vector, vector_to_string(vector));
184}
185
186void external_interrupt(__u64 vector, struct exception_regdump *pstate)
[dbd1059]187{
[05d9dd89]188 cr_ivr_t ivr;
[dbd1059]189
[05d9dd89]190 ivr.value = ivr_read();
[dbd1059]191 srlz_d();
[83817ea]192
[dd118f0]193 switch(ivr.vector) {
[05d9dd89]194 case INTERRUPT_TIMER:
[154049e]195 it_interrupt();
[05d9dd89]196 break;
197 case INTERRUPT_SPURIOUS:
198 printf("cpu%d: spurious interrupt\n", CPU->id);
199 break;
[dbd1059]200 default:
[05d9dd89]201 panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);
202 break;
[dbd1059]203 }
204}
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