[dbd1059] | 1 | /*
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| 2 | * Copyright (C) 2005 Jakub Jermar
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[e2ec980f] | 3 | * Copyright (C) 2005 Jakub Vana
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[dbd1059] | 4 | * All rights reserved.
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| 5 | *
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| 6 | * Redistribution and use in source and binary forms, with or without
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| 7 | * modification, are permitted provided that the following conditions
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| 8 | * are met:
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| 9 | *
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| 10 | * - Redistributions of source code must retain the above copyright
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| 11 | * notice, this list of conditions and the following disclaimer.
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| 12 | * - Redistributions in binary form must reproduce the above copyright
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| 13 | * notice, this list of conditions and the following disclaimer in the
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| 14 | * documentation and/or other materials provided with the distribution.
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| 15 | * - The name of the author may not be used to endorse or promote products
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| 16 | * derived from this software without specific prior written permission.
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| 17 | *
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| 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 28 | *
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| 29 | */
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| 30 |
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| 31 | #include <arch/interrupt.h>
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| 32 | #include <panic.h>
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[05d9dd89] | 33 | #include <print.h>
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[72f5866d] | 34 | #include <console/console.h>
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[dbd1059] | 35 | #include <arch/types.h>
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| 36 | #include <arch/asm.h>
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| 37 | #include <arch/barrier.h>
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[0259524] | 38 | #include <arch/register.h>
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[154049e] | 39 | #include <arch/drivers/it.h>
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[05d9dd89] | 40 | #include <arch.h>
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[e2ec980f] | 41 | #include <symtab.h>
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| 42 | #include <debug.h>
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[901122b] | 43 | #include <syscall/syscall.h>
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| 44 | #include <print.h>
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[dbd1059] | 45 |
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[e2ec980f] | 46 | #define VECTORS_64_BUNDLE 20
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| 47 | #define VECTORS_16_BUNDLE 48
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| 48 | #define VECTORS_16_BUNDLE_START 0x5000
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| 49 | #define VECTOR_MAX 0x7f00
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| 50 |
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| 51 | #define BUNDLE_SIZE 16
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| 52 |
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| 53 | char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {
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| 54 | "VHPT Translation vector",
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| 55 | "Instruction TLB vector",
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| 56 | "Data TLB vector",
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| 57 | "Alternate Instruction TLB vector",
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| 58 | "Alternate Data TLB vector",
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| 59 | "Data Nested TLB vector",
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| 60 | "Instruction Key Miss vector",
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| 61 | "Data Key Miss vector",
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| 62 | "Dirty-Bit vector",
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| 63 | "Instruction Access-Bit vector",
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| 64 | "Data Access-Bit vector"
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| 65 | "Break Instruction vector",
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| 66 | "External Interrupt vector"
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| 67 | "Reserved",
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| 68 | "Reserved",
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| 69 | "Reserved",
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| 70 | "Reserved",
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| 71 | "Reserved",
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| 72 | "Reserved",
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| 73 | "Reserved"
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| 74 | };
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| 75 |
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| 76 | char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {
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| 77 | "Page Not Present vector",
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| 78 | "Key Permission vector",
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| 79 | "Instruction Access rights vector",
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| 80 | "Data Access Rights vector",
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| 81 | "General Exception vector",
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| 82 | "Disabled FP-Register vector",
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| 83 | "NaT Consumption vector",
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| 84 | "Speculation vector",
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| 85 | "Reserved",
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| 86 | "Debug vector",
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| 87 | "Unaligned Reference vector",
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| 88 | "Unsupported Data Reference vector",
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| 89 | "Floating-point Fault vector",
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| 90 | "Floating-point Trap vector",
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| 91 | "Lower-Privilege Transfer Trap vector",
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| 92 | "Taken Branch Trap vector",
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| 93 | "Single STep Trap vector",
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| 94 | "Reserved",
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| 95 | "Reserved",
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| 96 | "Reserved",
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| 97 | "Reserved",
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| 98 | "Reserved",
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| 99 | "Reserved",
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| 100 | "Reserved",
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| 101 | "Reserved",
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| 102 | "IA-32 Exception vector",
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| 103 | "IA-32 Intercept vector",
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| 104 | "IA-32 Interrupt vector",
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| 105 | "Reserved",
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| 106 | "Reserved",
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| 107 | "Reserved"
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| 108 | };
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| 109 |
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| 110 | static char *vector_to_string(__u16 vector);
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[25d7709] | 111 | static void dump_interrupted_context(istate_t *istate);
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[e2ec980f] | 112 |
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| 113 | char *vector_to_string(__u16 vector)
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| 114 | {
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| 115 | ASSERT(vector <= VECTOR_MAX);
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| 116 |
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| 117 | if (vector >= VECTORS_16_BUNDLE_START)
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| 118 | return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];
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| 119 | else
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| 120 | return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];
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| 121 | }
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| 122 |
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[25d7709] | 123 | void dump_interrupted_context(istate_t *istate)
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[e2ec980f] | 124 | {
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| 125 | char *ifa, *iipa, *iip;
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| 126 |
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[25d7709] | 127 | ifa = get_symtab_entry(istate->cr_ifa);
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| 128 | iipa = get_symtab_entry(istate->cr_iipa);
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| 129 | iip = get_symtab_entry(istate->cr_iip);
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[e2ec980f] | 130 |
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| 131 | putchar('\n');
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[2ccd275] | 132 | printf("Interrupted context dump:\n");
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[25d7709] | 133 | printf("ar.bsp=%P\tar.bspstore=%P\n", istate->ar_bsp, istate->ar_bspstore);
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| 134 | printf("ar.rnat=%Q\tar.rsc=%Q\n", istate->ar_rnat, istate->ar_rsc);
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| 135 | printf("ar.ifs=%Q\tar.pfs=%Q\n", istate->ar_ifs, istate->ar_pfs);
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| 136 | printf("cr.isr=%Q\tcr.ipsr=%Q\t\n", istate->cr_isr.value, istate->cr_ipsr);
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[e2ec980f] | 137 |
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[25d7709] | 138 | printf("cr.iip=%Q, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei ,iip ? iip : "?");
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| 139 | printf("cr.iipa=%Q\t(%s)\n", istate->cr_iipa, iipa ? iipa : "?");
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| 140 | printf("cr.ifa=%Q\t(%s)\n", istate->cr_ifa, ifa ? ifa : "?");
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[e2ec980f] | 141 | }
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| 142 |
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[25d7709] | 143 | void general_exception(__u64 vector, istate_t *istate)
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[e2ec980f] | 144 | {
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[2ccd275] | 145 | char *desc = "";
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| 146 |
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[25d7709] | 147 | dump_interrupted_context(istate);
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[2ccd275] | 148 |
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[25d7709] | 149 | switch (istate->cr_isr.ge_code) {
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[2ccd275] | 150 | case GE_ILLEGALOP:
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| 151 | desc = "Illegal Operation fault";
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| 152 | break;
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| 153 | case GE_PRIVOP:
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| 154 | desc = "Privileged Operation fault";
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| 155 | break;
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| 156 | case GE_PRIVREG:
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| 157 | desc = "Privileged Register fault";
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| 158 | break;
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| 159 | case GE_RESREGFLD:
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| 160 | desc = "Reserved Register/Field fault";
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| 161 | break;
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| 162 | case GE_DISBLDISTRAN:
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| 163 | desc = "Disabled Instruction Set Transition fault";
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| 164 | break;
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| 165 | case GE_ILLEGALDEP:
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| 166 | desc = "Illegal Dependency fault";
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| 167 | break;
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| 168 | default:
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| 169 | desc = "unknown";
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| 170 | break;
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| 171 | }
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| 172 |
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| 173 | panic("General Exception (%s)\n", desc);
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[e2ec980f] | 174 | }
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| 175 |
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[901122b] | 176 | /** Handle syscall. */
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[25d7709] | 177 | int break_instruction(__u64 vector, istate_t *istate)
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[e2ec980f] | 178 | {
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[901122b] | 179 | /*
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| 180 | * Move to next instruction after BREAK.
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| 181 | */
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[25d7709] | 182 | if (istate->cr_ipsr.ri == 2) {
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| 183 | istate->cr_ipsr.ri = 0;
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| 184 | istate->cr_iip += 16;
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[901122b] | 185 | } else {
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[25d7709] | 186 | istate->cr_ipsr.ri++;
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[901122b] | 187 | }
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| 188 |
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[25d7709] | 189 | if (istate->in3 < SYSCALL_END)
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| 190 | return syscall_table[istate->in3](istate->in0, istate->in1, istate->in2);
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[901122b] | 191 | else
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[25d7709] | 192 | panic("Undefined syscall %d", istate->in3);
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[901122b] | 193 |
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| 194 | return -1;
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[e2ec980f] | 195 | }
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| 196 |
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[25d7709] | 197 | void universal_handler(__u64 vector, istate_t *istate)
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[e2ec980f] | 198 | {
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[25d7709] | 199 | dump_interrupted_context(istate);
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[e2ec980f] | 200 | panic("Interruption: %W (%s)\n", (__u16) vector, vector_to_string(vector));
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| 201 | }
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| 202 |
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[25d7709] | 203 | void external_interrupt(__u64 vector, istate_t *istate)
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[dbd1059] | 204 | {
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[05d9dd89] | 205 | cr_ivr_t ivr;
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[dbd1059] | 206 |
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[05d9dd89] | 207 | ivr.value = ivr_read();
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[dbd1059] | 208 | srlz_d();
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[83817ea] | 209 |
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[dd118f0] | 210 | switch(ivr.vector) {
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[05d9dd89] | 211 | case INTERRUPT_TIMER:
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[154049e] | 212 | it_interrupt();
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[05d9dd89] | 213 | break;
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| 214 | case INTERRUPT_SPURIOUS:
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| 215 | printf("cpu%d: spurious interrupt\n", CPU->id);
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| 216 | break;
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[dbd1059] | 217 | default:
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[05d9dd89] | 218 | panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);
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| 219 | break;
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[dbd1059] | 220 | }
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| 221 | }
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