source: mainline/arch/ia64/src/interrupt.c@ 25d7709

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 25d7709 was 25d7709, checked in by Jakub Jermar <jakub@…>, 19 years ago

Nicer ia32 interrupt handlers and structures holding interrupted context data.
Unify the name holding interrupted context data on all architectures to be istate.

  • Property mode set to 100644
File size: 5.9 KB
RevLine 
[dbd1059]1/*
2 * Copyright (C) 2005 Jakub Jermar
[e2ec980f]3 * Copyright (C) 2005 Jakub Vana
[dbd1059]4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 */
30
31#include <arch/interrupt.h>
32#include <panic.h>
[05d9dd89]33#include <print.h>
[72f5866d]34#include <console/console.h>
[dbd1059]35#include <arch/types.h>
36#include <arch/asm.h>
37#include <arch/barrier.h>
[0259524]38#include <arch/register.h>
[154049e]39#include <arch/drivers/it.h>
[05d9dd89]40#include <arch.h>
[e2ec980f]41#include <symtab.h>
42#include <debug.h>
[901122b]43#include <syscall/syscall.h>
44#include <print.h>
[dbd1059]45
[e2ec980f]46#define VECTORS_64_BUNDLE 20
47#define VECTORS_16_BUNDLE 48
48#define VECTORS_16_BUNDLE_START 0x5000
49#define VECTOR_MAX 0x7f00
50
51#define BUNDLE_SIZE 16
52
53char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {
54 "VHPT Translation vector",
55 "Instruction TLB vector",
56 "Data TLB vector",
57 "Alternate Instruction TLB vector",
58 "Alternate Data TLB vector",
59 "Data Nested TLB vector",
60 "Instruction Key Miss vector",
61 "Data Key Miss vector",
62 "Dirty-Bit vector",
63 "Instruction Access-Bit vector",
64 "Data Access-Bit vector"
65 "Break Instruction vector",
66 "External Interrupt vector"
67 "Reserved",
68 "Reserved",
69 "Reserved",
70 "Reserved",
71 "Reserved",
72 "Reserved",
73 "Reserved"
74};
75
76char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {
77 "Page Not Present vector",
78 "Key Permission vector",
79 "Instruction Access rights vector",
80 "Data Access Rights vector",
81 "General Exception vector",
82 "Disabled FP-Register vector",
83 "NaT Consumption vector",
84 "Speculation vector",
85 "Reserved",
86 "Debug vector",
87 "Unaligned Reference vector",
88 "Unsupported Data Reference vector",
89 "Floating-point Fault vector",
90 "Floating-point Trap vector",
91 "Lower-Privilege Transfer Trap vector",
92 "Taken Branch Trap vector",
93 "Single STep Trap vector",
94 "Reserved",
95 "Reserved",
96 "Reserved",
97 "Reserved",
98 "Reserved",
99 "Reserved",
100 "Reserved",
101 "Reserved",
102 "IA-32 Exception vector",
103 "IA-32 Intercept vector",
104 "IA-32 Interrupt vector",
105 "Reserved",
106 "Reserved",
107 "Reserved"
108};
109
110static char *vector_to_string(__u16 vector);
[25d7709]111static void dump_interrupted_context(istate_t *istate);
[e2ec980f]112
113char *vector_to_string(__u16 vector)
114{
115 ASSERT(vector <= VECTOR_MAX);
116
117 if (vector >= VECTORS_16_BUNDLE_START)
118 return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];
119 else
120 return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];
121}
122
[25d7709]123void dump_interrupted_context(istate_t *istate)
[e2ec980f]124{
125 char *ifa, *iipa, *iip;
126
[25d7709]127 ifa = get_symtab_entry(istate->cr_ifa);
128 iipa = get_symtab_entry(istate->cr_iipa);
129 iip = get_symtab_entry(istate->cr_iip);
[e2ec980f]130
131 putchar('\n');
[2ccd275]132 printf("Interrupted context dump:\n");
[25d7709]133 printf("ar.bsp=%P\tar.bspstore=%P\n", istate->ar_bsp, istate->ar_bspstore);
134 printf("ar.rnat=%Q\tar.rsc=%Q\n", istate->ar_rnat, istate->ar_rsc);
135 printf("ar.ifs=%Q\tar.pfs=%Q\n", istate->ar_ifs, istate->ar_pfs);
136 printf("cr.isr=%Q\tcr.ipsr=%Q\t\n", istate->cr_isr.value, istate->cr_ipsr);
[e2ec980f]137
[25d7709]138 printf("cr.iip=%Q, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei ,iip ? iip : "?");
139 printf("cr.iipa=%Q\t(%s)\n", istate->cr_iipa, iipa ? iipa : "?");
140 printf("cr.ifa=%Q\t(%s)\n", istate->cr_ifa, ifa ? ifa : "?");
[e2ec980f]141}
142
[25d7709]143void general_exception(__u64 vector, istate_t *istate)
[e2ec980f]144{
[2ccd275]145 char *desc = "";
146
[25d7709]147 dump_interrupted_context(istate);
[2ccd275]148
[25d7709]149 switch (istate->cr_isr.ge_code) {
[2ccd275]150 case GE_ILLEGALOP:
151 desc = "Illegal Operation fault";
152 break;
153 case GE_PRIVOP:
154 desc = "Privileged Operation fault";
155 break;
156 case GE_PRIVREG:
157 desc = "Privileged Register fault";
158 break;
159 case GE_RESREGFLD:
160 desc = "Reserved Register/Field fault";
161 break;
162 case GE_DISBLDISTRAN:
163 desc = "Disabled Instruction Set Transition fault";
164 break;
165 case GE_ILLEGALDEP:
166 desc = "Illegal Dependency fault";
167 break;
168 default:
169 desc = "unknown";
170 break;
171 }
172
173 panic("General Exception (%s)\n", desc);
[e2ec980f]174}
175
[901122b]176/** Handle syscall. */
[25d7709]177int break_instruction(__u64 vector, istate_t *istate)
[e2ec980f]178{
[901122b]179 /*
180 * Move to next instruction after BREAK.
181 */
[25d7709]182 if (istate->cr_ipsr.ri == 2) {
183 istate->cr_ipsr.ri = 0;
184 istate->cr_iip += 16;
[901122b]185 } else {
[25d7709]186 istate->cr_ipsr.ri++;
[901122b]187 }
188
[25d7709]189 if (istate->in3 < SYSCALL_END)
190 return syscall_table[istate->in3](istate->in0, istate->in1, istate->in2);
[901122b]191 else
[25d7709]192 panic("Undefined syscall %d", istate->in3);
[901122b]193
194 return -1;
[e2ec980f]195}
196
[25d7709]197void universal_handler(__u64 vector, istate_t *istate)
[e2ec980f]198{
[25d7709]199 dump_interrupted_context(istate);
[e2ec980f]200 panic("Interruption: %W (%s)\n", (__u16) vector, vector_to_string(vector));
201}
202
[25d7709]203void external_interrupt(__u64 vector, istate_t *istate)
[dbd1059]204{
[05d9dd89]205 cr_ivr_t ivr;
[dbd1059]206
[05d9dd89]207 ivr.value = ivr_read();
[dbd1059]208 srlz_d();
[83817ea]209
[dd118f0]210 switch(ivr.vector) {
[05d9dd89]211 case INTERRUPT_TIMER:
[154049e]212 it_interrupt();
[05d9dd89]213 break;
214 case INTERRUPT_SPURIOUS:
215 printf("cpu%d: spurious interrupt\n", CPU->id);
216 break;
[dbd1059]217 default:
[05d9dd89]218 panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);
219 break;
[dbd1059]220 }
221}
Note: See TracBrowser for help on using the repository browser.