source: mainline/arch/ia64/src/ia64.c@ bf56fef

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export 0.2.0
Last change on this file since bf56fef was 3247f0a, checked in by Jakub Jermar <jakub@…>, 20 years ago

Support loading up to 8 userspace images on ia64.

  • Property mode set to 100644
File size: 4.0 KB
RevLine 
[2a0047fc]1/*
2 * Copyright (C) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[244f284]29#include <arch.h>
30#include <arch/ski/ski.h>
[154049e]31#include <arch/drivers/it.h>
[e2ec980f]32#include <arch/interrupt.h>
33#include <arch/barrier.h>
[b994a60]34#include <arch/asm.h>
35#include <arch/register.h>
[e2ec980f]36#include <arch/types.h>
[b994a60]37#include <arch/context.h>
[5c089c3a]38#include <arch/stack.h>
[b994a60]39#include <arch/mm/page.h>
40#include <mm/as.h>
41#include <config.h>
42#include <userspace.h>
[a8c48241]43#include <console/console.h>
[0f250f9]44#include <proc/uarg.h>
[e1be3b6]45#include <syscall/syscall.h>
[244f284]46
[586262f]47static int kbd_release=0;
48
[6ecc8bce]49void arch_pre_main(void)
50{
51 /* Setup usermode init tasks. */
[3247f0a]52 init.cnt = 8;
[6ecc8bce]53 init.tasks[0].addr = INIT0_ADDRESS;
54 init.tasks[0].size = INIT0_SIZE;
[f8d069e8]55 init.tasks[1].addr = INIT0_ADDRESS + 0x400000;
56 init.tasks[1].size = INIT0_SIZE;
57 init.tasks[2].addr = INIT0_ADDRESS + 0x800000;
58 init.tasks[2].size = INIT0_SIZE;
59 init.tasks[3].addr = INIT0_ADDRESS + 0xc00000;
60 init.tasks[3].size = INIT0_SIZE;
61 init.tasks[4].addr = INIT0_ADDRESS + 0x1000000;
62 init.tasks[4].size = INIT0_SIZE;
[7224093]63 init.tasks[5].addr = INIT0_ADDRESS + 0x1400000;
64 init.tasks[5].size = INIT0_SIZE;
[3247f0a]65 init.tasks[6].addr = INIT0_ADDRESS + 0x1800000;
66 init.tasks[6].size = INIT0_SIZE;
67 init.tasks[7].addr = INIT0_ADDRESS + 0x1c00000;
68 init.tasks[7].size = INIT0_SIZE;
[6ecc8bce]69}
70
[244f284]71void arch_pre_mm_init(void)
72{
[e2ec980f]73 /* Set Interruption Vector Address (i.e. location of interruption vector table). */
74 iva_write((__address) &ivt);
75 srlz_d();
76
[2b50d7c]77 ski_init_console();
[6ecc8bce]78 it_init();
[244f284]79}
80
81void arch_post_mm_init(void)
82{
[d0c5901]83 ski_set_console_sysinfo();
[244f284]84}
[7453929]85
86void arch_pre_smp_init(void)
87{
88}
89
90void arch_post_smp_init(void)
91{
92}
[b994a60]93
94/** Enter userspace and never return. */
[0f250f9]95void userspace(uspace_arg_t *kernel_uarg)
[b994a60]96{
97 psr_t psr;
98 rsc_t rsc;
99
100 psr.value = psr_read();
101 psr.cpl = PL_USER;
102 psr.i = true; /* start with interrupts enabled */
103 psr.ic = true;
104 psr.ri = 0; /* start with instruction #0 */
[1065603e]105 psr.bn = 1; /* start in bank 0 */
[b994a60]106
107 __asm__ volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
108 rsc.loadrs = 0;
109 rsc.be = false;
110 rsc.pl = PL_USER;
111 rsc.mode = 3; /* eager mode */
112
[0f250f9]113 switch_to_userspace((__address) kernel_uarg->uspace_entry,
114 ((__address) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
[8e5e78f]115 ((__address) kernel_uarg->uspace_stack)+PAGE_SIZE,
[0f250f9]116 (__address) kernel_uarg->uspace_uarg,
117 psr.value, rsc.value);
[b994a60]118
119 while (1) {
120 ;
121 }
122}
[e1be3b6]123
124/** Set thread-local-storage pointer.
125 *
126 * We use r13 (a.k.a. tp) for this purpose.
127 */
128__native sys_tls_set(__native addr)
129{
130 return 0;
131}
[41d33ac]132
133/** Acquire console back for kernel
134 *
135 */
136void arch_grab_console(void)
137{
[586262f]138 kbd_release=kbd_uspace;
139 kbd_uspace=0;
[41d33ac]140}
141/** Return console to userspace
142 *
143 */
144void arch_release_console(void)
145{
[586262f]146 kbd_uspace=kbd_release;
[41d33ac]147}
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