source: mainline/arch/ia64/src/cpu/cpu.c@ 0172eba

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 0172eba was 0172eba, checked in by Jakub Jermar <jakub@…>, 20 years ago

ia64 CPU identification.

  • Property mode set to 100644
File size: 2.3 KB
RevLine 
[802bb95]1/*
2 * Copyright (C) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[d2bb9f8a]29#include <cpu.h>
[0172eba]30#include <arch.h>
31#include <arch/register.h>
32#include <print.h>
[d2bb9f8a]33
34void cpu_arch_init(void)
35{
36}
37
[0172eba]38void cpu_identify(void)
39{
40 CPU->arch.cpuid0 = cpuid_read(0);
41 CPU->arch.cpuid1 = cpuid_read(1);
42 CPU->arch.cpuid3.value = cpuid_read(3);
43}
[d2bb9f8a]44
[0172eba]45void cpu_print_report(cpu_t *m)
46{
47 char *family_str;
48 char vendor[2*sizeof(__u64)+1];
49
50 *((__u64 *) &vendor[0*sizeof(__u64)]) = CPU->arch.cpuid0;
51 *((__u64 *) &vendor[1*sizeof(__u64)]) = CPU->arch.cpuid1;
52 vendor[sizeof(vendor)-1] = '\0';
53
54 switch(m->arch.cpuid3.family) {
55 case FAMILY_ITANIUM:
56 family_str = "Itanium";
57 break;
58 case FAMILY_ITANIUM2:
59 family_str = "Itanium 2";
60 break;
61 default:
62 family_str = "Unknown";
63 break;
64 }
65
66 printf("cpu%d: %s (%s), archrev=%d, model=%d, revision=%d\n", CPU->id, family_str, vendor, CPU->arch.cpuid3.archrev, CPU->arch.cpuid3.model, CPU->arch.cpuid3.revision);
67}
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