source: mainline/arch/ia64/src/context.S@ d9f81af3

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since d9f81af3 was 60049aa, checked in by Jakub Jermar <jakub@…>, 21 years ago

IA-64 work.
Save/restore the rest of AR registers (i.e. RSE registers) in context_save()/context_restore().
  • Property mode set to 100644
File size: 6.3 KB
Line 
1#
2# Copyright (C) 2005 Jakub Jermar
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29.text
30
31.global context_save
32.global context_restore
33
34context_save:
35 alloc loc0 = ar.pfs, 1, 11, 0, 0
36 mov loc1 = ar.unat ;;
37 /* loc2 */
38 mov loc3 = ar.rsc
39
40 .auto
41
42 /*
43 * Flush dirty registers to backing store.
44 * After this ar.bsp and ar.bspstore are equal.
45 */
46 flushrs
47 mov loc4 = ar.bsp
48
49 /*
50 * Put RSE to enforced lazy mode.
51 * So that ar.rnat can be read.
52 */
53 movl loc5 = ~3
54 and loc5 = loc3, loc5
55 mov ar.rsc = loc5
56 mov loc5 = ar.rnat
57
58 .explicit
59
60 mov loc6 = ar.lc
61 mov loc7 = ar.ec
62 mov loc8 = ar.ccv
63 mov loc9 = ar.csd
64 mov loc10 = ar.ssd
65
66 /*
67 * Save application registers
68 */
69 st8 [in0] = loc0, 8 ;; /* save ar.pfs */
70 st8 [in0] = loc1, 8 ;; /* save ar.unat (caller) */
71 mov loc2 = in0 ;;
72 add in0 = 8, in0 ;; /* skip ar.unat (callee) */
73 st8 [in0] = loc3, 8 ;; /* save ar.rsc */
74 st8 [in0] = loc4, 8 ;; /* save ar.bsp */
75 st8 [in0] = loc5, 8 ;; /* save ar.rnat */
76 st8 [in0] = loc6, 8 ;; /* save ar.lc */
77 st8 [in0] = loc7, 8 ;; /* save ar.ec */
78 st8 [in0] = loc8, 8 ;; /* save ar.ccv */
79 st8 [in0] = loc9, 8 ;; /* save ar.csd */
80 st8 [in0] = loc10, 8 ;; /* save ar.ssd */
81
82 /*
83 * Save general registers including NaT bits
84 */
85 st8.spill [in0] = r1, 8 ;;
86 st8.spill [in0] = r2, 8 ;;
87 st8.spill [in0] = r3, 8 ;;
88 st8.spill [in0] = r4, 8 ;;
89 st8.spill [in0] = r5, 8 ;;
90 st8.spill [in0] = r6, 8 ;;
91 st8.spill [in0] = r7, 8 ;;
92 st8.spill [in0] = r8, 8 ;;
93 st8.spill [in0] = r9, 8 ;;
94 st8.spill [in0] = r10, 8 ;;
95 st8.spill [in0] = r11, 8 ;;
96 st8.spill [in0] = r12, 8 ;; /* save sp */
97 st8.spill [in0] = r13, 8 ;;
98 st8.spill [in0] = r14, 8 ;;
99 st8.spill [in0] = r15, 8 ;;
100 st8.spill [in0] = r16, 8 ;;
101 st8.spill [in0] = r17, 8 ;;
102 st8.spill [in0] = r18, 8 ;;
103 st8.spill [in0] = r19, 8 ;;
104 st8.spill [in0] = r20, 8 ;;
105 st8.spill [in0] = r21, 8 ;;
106 st8.spill [in0] = r22, 8 ;;
107 st8.spill [in0] = r23, 8 ;;
108 st8.spill [in0] = r24, 8 ;;
109 st8.spill [in0] = r25, 8 ;;
110 st8.spill [in0] = r26, 8 ;;
111 st8.spill [in0] = r27, 8 ;;
112 st8.spill [in0] = r28, 8 ;;
113 st8.spill [in0] = r29, 8 ;;
114 st8.spill [in0] = r30, 8 ;;
115 st8.spill [in0] = r31, 8 ;;
116
117 mov loc3 = ar.unat ;;
118 st8 [loc2] = loc3 /* save ar.unat (callee) */
119
120 /*
121 * Save branch registers
122 */
123 mov loc2 = b0 ;;
124 st8 [in0] = loc2, 8 /* save pc */
125 mov loc3 = b1 ;;
126 st8 [in0] = loc3, 8
127 mov loc4 = b2 ;;
128 st8 [in0] = loc4, 8
129 mov loc5 = b3 ;;
130 st8 [in0] = loc5, 8
131 mov loc6 = b4 ;;
132 st8 [in0] = loc6, 8
133 mov loc7 = b5 ;;
134 st8 [in0] = loc7, 8
135 mov loc8 = b6 ;;
136 st8 [in0] = loc8, 8
137 mov loc9 = b7 ;;
138 st8 [in0] = loc9, 8
139
140 /*
141 * Save predicate registers
142 */
143 mov loc2 = pr ;;
144 st8 [in0] = loc2, 8
145
146 mov ar.pfs = loc0
147 mov ar.unat = loc1
148
149 add r8 = r0, r0, 1 /* context_save returns 1 */
150 br.ret.sptk.many b0
151
152context_restore:
153 alloc loc0 = ar.pfs, 1, 11, 0, 0 ;;
154
155 ld8 loc0 = [in0], 8 ;; /* load ar.pfs */
156 ld8 loc1 = [in0], 8 ;; /* load ar.unat (caller) */
157 ld8 loc2 = [in0], 8 ;; /* load ar.unat (callee) */
158 ld8 loc3 = [in0], 8 ;; /* load ar.rsc */
159 ld8 loc4 = [in0], 8 ;; /* load ar.bsp */
160 ld8 loc5 = [in0], 8 ;; /* load ar.rnat */
161 ld8 loc6 = [in0], 8 ;; /* load ar.lc */
162 ld8 loc7 = [in0], 8 ;; /* load ar.ec */
163 ld8 loc8 = [in0], 8 ;; /* load ar.ccv */
164 ld8 loc9 = [in0], 8 ;; /* load ar.csd */
165 ld8 loc10 = [in0], 8 ;; /* load ar.ssd */
166
167 .auto
168
169 /*
170 * Invalidate the ALAT
171 */
172 invala
173
174 /*
175 * Restore application registers
176 */
177
178 mov ar.bspstore = loc4
179 mov ar.rnat = loc5
180 mov ar.pfs = loc0
181 mov ar.rsc = loc3
182
183 .explicit
184
185 mov ar.unat = loc2 ;;
186 mov ar.lc = loc6
187 mov ar.ec = loc7
188 mov ar.ccv = loc8
189 mov ar.csd = loc9
190 mov ar.ssd = loc10
191
192 /*
193 * Restore general registers including NaT bits
194 */
195 ld8.fill r1 = [in0], 8 ;;
196 ld8.fill r2 = [in0], 8 ;;
197 ld8.fill r3 = [in0], 8 ;;
198 ld8.fill r4 = [in0], 8 ;;
199 ld8.fill r5 = [in0], 8 ;;
200 ld8.fill r6 = [in0], 8 ;;
201 ld8.fill r7 = [in0], 8 ;;
202 ld8.fill r8 = [in0], 8 ;;
203 ld8.fill r9 = [in0], 8 ;;
204 ld8.fill r10 = [in0], 8 ;;
205 ld8.fill r11 = [in0], 8 ;;
206 ld8.fill r12 = [in0], 8 ;; /* restore sp */
207 ld8.fill r13 = [in0], 8 ;;
208 ld8.fill r14 = [in0], 8 ;;
209 ld8.fill r15 = [in0], 8 ;;
210 ld8.fill r16 = [in0], 8 ;;
211 ld8.fill r17 = [in0], 8 ;;
212 ld8.fill r18 = [in0], 8 ;;
213 ld8.fill r19 = [in0], 8 ;;
214 ld8.fill r20 = [in0], 8 ;;
215 ld8.fill r21 = [in0], 8 ;;
216 ld8.fill r22 = [in0], 8 ;;
217 ld8.fill r23 = [in0], 8 ;;
218 ld8.fill r24 = [in0], 8 ;;
219 ld8.fill r25 = [in0], 8 ;;
220 ld8.fill r26 = [in0], 8 ;;
221 ld8.fill r27 = [in0], 8 ;;
222 ld8.fill r28 = [in0], 8 ;;
223 ld8.fill r29 = [in0], 8 ;;
224 ld8.fill r30 = [in0], 8 ;;
225 ld8.fill r31 = [in0], 8 ;;
226
227 /*
228 * Restore branch registers
229 */
230 ld8 loc2 = [in0], 8 ;; /* restore pc */
231 mov b0 = loc2
232 ld8 loc3 = [in0], 8 ;;
233 mov b1 = loc3
234 ld8 loc4 = [in0], 8 ;;
235 mov b2 = loc4
236 ld8 loc5 = [in0], 8 ;;
237 mov b3 = loc5
238 ld8 loc6 = [in0], 8 ;;
239 mov b4 = loc6
240 ld8 loc7 = [in0], 8 ;;
241 mov b5 = loc7
242 ld8 loc8 = [in0], 8 ;;
243 mov b6 = loc8
244 ld8 loc9 = [in0], 8 ;;
245 mov b7 = loc9
246
247 /*
248 * Restore predicate registers
249 */
250 ld8 loc2 = [in0], 8 ;;
251 mov pr = loc2, ~0
252
253 mov ar.unat = loc1
254
255 mov r8 = r0 /* context_restore returns 0 */
256 br.ret.sptk.many b0
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