source: mainline/arch/ia64/src/context.S@ ba1b7393

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since ba1b7393 was ba1b7393, checked in by Jakub Jermar <jakub@…>, 20 years ago

Reduce IA-64 context_t according to IA-64 ABI.

Make IA-64 port compile again.

  • Property mode set to 100644
File size: 4.4 KB
Line 
1#
2# Copyright (C) 2005 Jakub Jermar
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29.text
30
31.global context_save
32.global context_restore
33
34context_save:
35 alloc loc0 = ar.pfs, 1, 8, 0, 0
36 mov loc1 = ar.unat ;;
37 /* loc2 */
38 mov loc3 = ar.rsc
39
40 .auto
41
42 /*
43 * Flush dirty registers to backing store.
44 * After this ar.bsp and ar.bspstore are equal.
45 */
46 flushrs
47 mov loc4 = ar.bsp
48
49 /*
50 * Put RSE to enforced lazy mode.
51 * So that ar.rnat can be read.
52 */
53 movl loc5 = ~3
54 and loc5 = loc3, loc5
55 mov ar.rsc = loc5
56 mov loc5 = ar.rnat
57
58 .explicit
59
60 mov loc6 = ar.lc
61
62 /*
63 * Save application registers
64 */
65 st8 [in0] = loc0, 8 ;; /* save ar.pfs */
66 st8 [in0] = loc1, 8 ;; /* save ar.unat (caller) */
67 mov loc2 = in0 ;;
68 add in0 = 8, in0 ;; /* skip ar.unat (callee) */
69 st8 [in0] = loc3, 8 ;; /* save ar.rsc */
70 st8 [in0] = loc4, 8 ;; /* save ar.bsp */
71 st8 [in0] = loc5, 8 ;; /* save ar.rnat */
72 st8 [in0] = loc6, 8 ;; /* save ar.lc */
73
74 /*
75 * Save general registers including NaT bits
76 */
77 st8.spill [in0] = r1, 8 ;;
78 st8.spill [in0] = r4, 8 ;;
79 st8.spill [in0] = r5, 8 ;;
80 st8.spill [in0] = r6, 8 ;;
81 st8.spill [in0] = r7, 8 ;;
82 st8.spill [in0] = r12, 8 ;; /* save sp */
83 st8.spill [in0] = r13, 8 ;;
84
85 mov loc3 = ar.unat ;;
86 st8 [loc2] = loc3 /* save ar.unat (callee) */
87
88 /*
89 * Save branch registers
90 */
91 mov loc2 = b0 ;;
92 st8 [in0] = loc2, 8 /* save pc */
93 mov loc3 = b1 ;;
94 st8 [in0] = loc3, 8
95 mov loc4 = b2 ;;
96 st8 [in0] = loc4, 8
97 mov loc5 = b3 ;;
98 st8 [in0] = loc5, 8
99 mov loc6 = b4 ;;
100 st8 [in0] = loc6, 8
101 mov loc7 = b5 ;;
102 st8 [in0] = loc7, 8
103
104 /*
105 * Save predicate registers
106 */
107 mov loc2 = pr ;;
108 st8 [in0] = loc2, 8
109
110 mov ar.pfs = loc0
111 mov ar.unat = loc1
112
113 add r8 = r0, r0, 1 /* context_save returns 1 */
114 br.ret.sptk.many b0
115
116context_restore:
117 alloc loc0 = ar.pfs, 1, 8, 0, 0 ;;
118
119 ld8 loc0 = [in0], 8 ;; /* load ar.pfs */
120 ld8 loc1 = [in0], 8 ;; /* load ar.unat (caller) */
121 ld8 loc2 = [in0], 8 ;; /* load ar.unat (callee) */
122 ld8 loc3 = [in0], 8 ;; /* load ar.rsc */
123 ld8 loc4 = [in0], 8 ;; /* load ar.bsp */
124 ld8 loc5 = [in0], 8 ;; /* load ar.rnat */
125 ld8 loc6 = [in0], 8 ;; /* load ar.lc */
126
127 .auto
128
129 /*
130 * Invalidate the ALAT
131 */
132 invala
133
134 /*
135 * Restore application registers
136 */
137
138 mov ar.bspstore = loc4
139 mov ar.rnat = loc5
140 mov ar.pfs = loc0
141 mov ar.rsc = loc3
142
143 .explicit
144
145 mov ar.unat = loc2 ;;
146 mov ar.lc = loc6
147
148 /*
149 * Restore general registers including NaT bits
150 */
151 ld8.fill r1 = [in0], 8 ;;
152 ld8.fill r4 = [in0], 8 ;;
153 ld8.fill r5 = [in0], 8 ;;
154 ld8.fill r6 = [in0], 8 ;;
155 ld8.fill r7 = [in0], 8 ;;
156 ld8.fill r12 = [in0], 8 ;; /* restore sp */
157 ld8.fill r13 = [in0], 8 ;;
158
159 /*
160 * Restore branch registers
161 */
162 ld8 loc2 = [in0], 8 ;; /* restore pc */
163 mov b0 = loc2
164 ld8 loc3 = [in0], 8 ;;
165 mov b1 = loc3
166 ld8 loc4 = [in0], 8 ;;
167 mov b2 = loc4
168 ld8 loc5 = [in0], 8 ;;
169 mov b3 = loc5
170 ld8 loc6 = [in0], 8 ;;
171 mov b4 = loc6
172 ld8 loc7 = [in0], 8 ;;
173 mov b5 = loc7
174
175 /*
176 * Restore predicate registers
177 */
178 ld8 loc2 = [in0], 8 ;;
179 mov pr = loc2, ~0
180
181 mov ar.unat = loc1
182
183 mov r8 = r0 /* context_restore returns 0 */
184 br.ret.sptk.many b0
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