source: mainline/arch/ia64/src/context.S@ fc9c4e1

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since fc9c4e1 was 32a89bf, checked in by Jakub Jermar <jakub@…>, 20 years ago

IA-64 work.
Add application registers ar.lc, ar.ec, ar.ccv, ar.csd, ar.ssd to context_t.
Add store/load operations for ar.lc, ar.ec, ar.ccv, ar.csd, ar.ssd to context_save()/restore().
Add application registers ar.rcs, ar.bsp and ar.rnat to context_t.
Proper store/load operations for ar.rcs, ar.bsp and ar.rnat is in the works.

FPU cleanup.
Remove call set_TS_flag() from cpu_identify().
Remove unneeded includes from FPU test #1.
  • Property mode set to 100644
File size: 6.0 KB
Line 
1#
2# Copyright (C) 2005 Jakub Jermar
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29.text
30
31.global context_save
32.global context_restore
33
34context_save:
35 alloc loc0 = ar.pfs, 1, 11, 0, 0
36 mov loc1 = ar.unat ;;
37 /* loc2 */
38 mov loc3 = ar.rsc
39 mov loc4 = ar.bsp
40 mov loc5 = ar.rnat
41 mov loc6 = ar.lc
42 mov loc7 = ar.ec
43 mov loc8 = ar.ccv
44 mov loc9 = ar.csd
45 mov loc10 = ar.ssd
46
47 /*
48 * Save application registers
49 */
50 st8 [in0] = loc0, 8 ;; /* save ar.pfs */
51 st8 [in0] = loc1, 8 ;; /* save ar.unat (caller) */
52 mov loc2 = in0 ;;
53 add in0 = 8, in0 ;; /* skip ar.unat (callee) */
54 st8 [in0] = loc3, 8 ;; /* save ar.rsc */
55 st8 [in0] = loc4, 8 ;; /* save ar.bsp */
56 st8 [in0] = loc5, 8 ;; /* save ar.rnat */
57 st8 [in0] = loc6, 8 ;; /* save ar.lc */
58 st8 [in0] = loc7, 8 ;; /* save ar.ec */
59 st8 [in0] = loc8, 8 ;; /* save ar.ccv */
60 st8 [in0] = loc9, 8 ;; /* save ar.csd */
61 st8 [in0] = loc10, 8 ;; /* save ar.ssd */
62
63 /*
64 * Save general registers including NaT bits
65 */
66 st8.spill [in0] = r1, 8 ;;
67 st8.spill [in0] = r2, 8 ;;
68 st8.spill [in0] = r3, 8 ;;
69 st8.spill [in0] = r4, 8 ;;
70 st8.spill [in0] = r5, 8 ;;
71 st8.spill [in0] = r6, 8 ;;
72 st8.spill [in0] = r7, 8 ;;
73 st8.spill [in0] = r8, 8 ;;
74 st8.spill [in0] = r9, 8 ;;
75 st8.spill [in0] = r10, 8 ;;
76 st8.spill [in0] = r11, 8 ;;
77 st8.spill [in0] = r12, 8 ;; /* save sp */
78 st8.spill [in0] = r13, 8 ;;
79 st8.spill [in0] = r14, 8 ;;
80 st8.spill [in0] = r15, 8 ;;
81 st8.spill [in0] = r16, 8 ;;
82 st8.spill [in0] = r17, 8 ;;
83 st8.spill [in0] = r18, 8 ;;
84 st8.spill [in0] = r19, 8 ;;
85 st8.spill [in0] = r20, 8 ;;
86 st8.spill [in0] = r21, 8 ;;
87 st8.spill [in0] = r22, 8 ;;
88 st8.spill [in0] = r23, 8 ;;
89 st8.spill [in0] = r24, 8 ;;
90 st8.spill [in0] = r25, 8 ;;
91 st8.spill [in0] = r26, 8 ;;
92 st8.spill [in0] = r27, 8 ;;
93 st8.spill [in0] = r28, 8 ;;
94 st8.spill [in0] = r29, 8 ;;
95 st8.spill [in0] = r30, 8 ;;
96 st8.spill [in0] = r31, 8 ;;
97
98 mov loc3 = ar.unat ;;
99 st8 [loc2] = loc3 /* save ar.unat (callee) */
100
101 /*
102 * Save branch registers
103 */
104 mov loc2 = b0 ;;
105 st8 [in0] = loc2, 8 /* save pc */
106 mov loc3 = b1 ;;
107 st8 [in0] = loc3, 8
108 mov loc4 = b2 ;;
109 st8 [in0] = loc4, 8
110 mov loc5 = b3 ;;
111 st8 [in0] = loc5, 8
112 mov loc6 = b4 ;;
113 st8 [in0] = loc6, 8
114 mov loc7 = b5 ;;
115 st8 [in0] = loc7, 8
116 mov loc8 = b6 ;;
117 st8 [in0] = loc8, 8
118 mov loc9 = b7 ;;
119 st8 [in0] = loc9, 8
120
121 /*
122 * Save predicate registers
123 */
124 mov loc2 = pr ;;
125 st8 [in0] = loc2, 8
126
127 mov ar.pfs = loc0
128 mov ar.unat = loc1
129
130 add r8 = r0, r0, 1 /* context_save returns 1 */
131 br.ret.sptk.many b0
132
133context_restore:
134 alloc loc0 = ar.pfs, 1, 11, 0, 0 ;;
135
136 ld8 loc0 = [in0], 8 ;; /* load ar.pfs */
137 ld8 loc1 = [in0], 8 ;; /* load ar.unat (caller) */
138 ld8 loc2 = [in0], 8 ;; /* load ar.unat (callee) */
139 ld8 loc3 = [in0], 8 ;; /* load ar.rsc */
140 ld8 loc4 = [in0], 8 ;; /* load ar.bsp */
141 ld8 loc5 = [in0], 8 ;; /* load ar.rnat */
142 ld8 loc6 = [in0], 8 ;; /* load ar.lc */
143 ld8 loc7 = [in0], 8 ;; /* load ar.ec */
144 ld8 loc8 = [in0], 8 ;; /* load ar.ccv */
145 ld8 loc9 = [in0], 8 ;; /* load ar.csd */
146 ld8 loc10 = [in0], 8 ;; /* load ar.ssd */
147
148 /*
149 * Restore application registers
150 */
151 mov ar.unat = loc2 ;;
152 /* TODO: restore ar.rsc, ar.rnat, ar.bspstore */
153 mov ar.lc = loc6
154 mov ar.ec = loc7
155 mov ar.ccv = loc8
156 mov ar.csd = loc9
157 mov ar.ssd = loc10
158
159 /*
160 * Restore general registers including NaT bits
161 */
162 ld8.fill r1 = [in0], 8 ;;
163 ld8.fill r2 = [in0], 8 ;;
164 ld8.fill r3 = [in0], 8 ;;
165 ld8.fill r4 = [in0], 8 ;;
166 ld8.fill r5 = [in0], 8 ;;
167 ld8.fill r6 = [in0], 8 ;;
168 ld8.fill r7 = [in0], 8 ;;
169 ld8.fill r8 = [in0], 8 ;;
170 ld8.fill r9 = [in0], 8 ;;
171 ld8.fill r10 = [in0], 8 ;;
172 ld8.fill r11 = [in0], 8 ;;
173 ld8.fill r12 = [in0], 8 ;; /* restore sp */
174 ld8.fill r13 = [in0], 8 ;;
175 ld8.fill r14 = [in0], 8 ;;
176 ld8.fill r15 = [in0], 8 ;;
177 ld8.fill r16 = [in0], 8 ;;
178 ld8.fill r17 = [in0], 8 ;;
179 ld8.fill r18 = [in0], 8 ;;
180 ld8.fill r19 = [in0], 8 ;;
181 ld8.fill r20 = [in0], 8 ;;
182 ld8.fill r21 = [in0], 8 ;;
183 ld8.fill r22 = [in0], 8 ;;
184 ld8.fill r23 = [in0], 8 ;;
185 ld8.fill r24 = [in0], 8 ;;
186 ld8.fill r25 = [in0], 8 ;;
187 ld8.fill r26 = [in0], 8 ;;
188 ld8.fill r27 = [in0], 8 ;;
189 ld8.fill r28 = [in0], 8 ;;
190 ld8.fill r29 = [in0], 8 ;;
191 ld8.fill r30 = [in0], 8 ;;
192 ld8.fill r31 = [in0], 8 ;;
193
194 /*
195 * Restore branch registers
196 */
197 ld8 loc2 = [in0], 8 ;; /* restore pc */
198 mov b0 = loc2
199 ld8 loc3 = [in0], 8 ;;
200 mov b1 = loc3
201 ld8 loc4 = [in0], 8 ;;
202 mov b2 = loc4
203 ld8 loc5 = [in0], 8 ;;
204 mov b3 = loc5
205 ld8 loc6 = [in0], 8 ;;
206 mov b4 = loc6
207 ld8 loc7 = [in0], 8 ;;
208 mov b5 = loc7
209 ld8 loc8 = [in0], 8 ;;
210 mov b6 = loc8
211 ld8 loc9 = [in0], 8 ;;
212 mov b7 = loc9
213
214 /*
215 * Restore predicate registers
216 */
217 ld8 loc2 = [in0], 8 ;;
218 mov pr = loc2, ~0
219
220 mov ar.pfs = loc0
221 mov ar.unat = loc1
222
223 mov r8 = r0 /* context_restore returns 0 */
224 br.ret.sptk.many b0
Note: See TracBrowser for help on using the repository browser.