source: mainline/arch/ia64/src/asm.S@ c6c59ccd

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since c6c59ccd was e3c762cd, checked in by Jakub Jermar <jakub@…>, 19 years ago

Complete implementation of copy_from_uspace() and copy_to_uspace()
for amd64 and ia32. Other architectures still compile and run,
but need to implement their own assembly-only memcpy(), memcpy_from_uspace(),
memcpy_to_uspace() and their failover parts. For these architectures
only dummy implementations are provided.

  • Property mode set to 100644
File size: 3.0 KB
Line 
1#
2# Copyright (C) 2005 Jakub Jermar
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29#include <arch/register.h>
30
31.text
32
33/** Copy memory from/to userspace.
34 *
35 * @param in0 Destination address.
36 * @param in1 Source address.
37 * @param in2 Number of byte to copy.
38 */
39.global memcpy
40.global memcpy_from_uspace
41.global memcpy_to_uspace
42.global memcpy_from_uspace_failover_address
43.global memcpy_to_uspace_failover_address
44memcpy:
45memcpy_from_uspace:
46memcpy_to_uspace:
47 br _memcpy
48
49memcpy_from_uspace_failover_address:
50memcpy_to_uspace_failover_address:
51 br memcpy_from_uspace_failover_address
52
53.global memsetb
54memsetb:
55 br _memsetb
56
57.global cpu_halt
58cpu_halt:
59 br cpu_halt
60
61.global panic_printf
62panic_printf:
63 {
64 br.call.sptk.many b0=printf
65 }
66 br halt
67
68/** Switch to userspace - low level code.
69 *
70 * @param in0 Userspace entry point address.
71 * @param in1 Userspace stack pointer address.
72 * @param in2 Userspace register stack pointer address.
73 * @param in3 Userspace address of thread uspace_arg_t structure.
74 * @param in4 Value to be stored in IPSR.
75 * @param in5 Value to be stored in RSC.
76 */
77.global switch_to_userspace
78switch_to_userspace:
79 alloc loc0 = ar.pfs, 6, 3, 0, 0
80 rsm (PSR_IC_MASK | PSR_I_MASK) /* disable interruption collection and interrupts */
81 srlz.d ;;
82 srlz.i ;;
83
84 mov cr.ipsr = in4
85 mov cr.iip = in0
86 mov r12 = in1
87
88 xor r1 = r1, r1
89
90 mov loc1 = cr.ifs
91 movl loc2 = PFM_MASK ;;
92 and loc1 = loc2, loc1 ;;
93 mov cr.ifs = loc1 ;; /* prevent decrementing BSP by rfi */
94
95 invala
96
97 mov loc1 = ar.rsc ;;
98 and loc1 = ~3, loc1 ;;
99 mov ar.rsc = loc1 ;; /* put RSE into enforced lazy mode */
100
101 flushrs ;;
102
103 mov ar.bspstore = in2 ;;
104 mov ar.rsc = in5 ;;
105
106 mov r8 = in3
107
108 rfi ;;
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