source: mainline/arch/ia64/src/asm.S@ 7c322bd

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 7c322bd was b994a60, checked in by Jakub Jermar <jakub@…>, 19 years ago

ia64 work.
Changes to make userspace work (kernel part).
Use ski.conf from contrib directory to run Ski.

There is actually no appropriate syscall handler yet.

  • Property mode set to 100644
File size: 2.5 KB
Line 
1#
2# Copyright (C) 2005 Jakub Jermar
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29#include <arch/register.h>
30
31.text
32
33.global memcpy
34memcpy:
35 br _memcpy
36
37.global memsetb
38memsetb:
39 br _memsetb
40
41.global cpu_halt
42cpu_halt:
43 br cpu_halt
44
45.global panic_printf
46panic_printf:
47 {
48 br.call.sptk.many b0=printf
49 }
50 br halt
51
52/** Switch to userspace - low level code.
53 *
54 * @param in0 Userspace entry point address.
55 * @param in1 Userspace stack pointer address.
56 * @param in2 Userspace register stack pointer address.
57 * @param in3 Value to be stored in IPSR.
58 * @param in4 Value to be stored in RSC.
59 */
60.global switch_to_userspace
61switch_to_userspace:
62 alloc loc0 = ar.pfs, 5, 3, 0, 0
63 rsm (PSR_IC_MASK | PSR_I_MASK) /* disable interruption collection and interrupts */
64 srlz.d ;;
65 srlz.i ;;
66
67 mov cr.ipsr = in3
68 mov cr.iip = in0
69 mov r12 = in1
70
71 xor r1 = r1, r1
72
73 mov loc1 = cr.ifs
74 movl loc2 = PFM_MASK ;;
75 and loc1 = loc2, loc1 ;;
76 mov cr.ifs = loc1 ;; /* prevent decrementing BSP by rfi */
77
78 invala
79
80 mov loc1 = ar.rsc ;;
81 and loc1 = ~3, loc1 ;;
82 mov ar.rsc = loc1 ;; /* put RSE into enforced lazy mode */
83
84 flushrs ;;
85
86 mov ar.bspstore = in2 ;;
87 mov ar.rsc = in4 ;;
88
89 rfi ;;
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