source: mainline/arch/ia64/include/register.h@ 05d9dd89

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 05d9dd89 was 05d9dd89, checked in by Jakub Jermar <jakub@…>, 20 years ago

ia64 work.
Fix definition of u32.
Add more register manipulation functions.
Add unions describing bit-structured registers.
Distinguish between timer, unhandled and spurious external interrupts.
Initialize interval timer to generate first timer interrupt.

  • Property mode set to 100644
File size: 2.2 KB
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1/*
2 * Copyright (C) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __ia64_REGISTER_H__
30#define __ia64_REGISTER_H__
31
32#include <arch/types.h>
33
34#define CR_IVR_MASK 0xf
35#define PSR_I_MASK 0x4000
36
37/** External Interrupt Vector Register */
38union cr_ivr {
39 __u8 vector;
40 __u64 value;
41};
42
43typedef union cr_ivr cr_ivr_t;
44
45/** Task Priority Register */
46union cr_tpr {
47 struct {
48 unsigned : 4;
49 unsigned mic: 4; /**< Mask Interrupt Class. */
50 unsigned : 8;
51 unsigned mmi: 1; /**< Mask Maskable Interrupts. */
52 } __attribute__ ((packed));
53 __u64 value;
54};
55
56typedef union cr_tpr cr_tpr_t;
57
58/** Interval Timer Vector */
59union cr_itv {
60 struct {
61 unsigned vector : 8;
62 unsigned : 4;
63 unsigned : 1;
64 unsigned : 3;
65 unsigned m : 1; /**< Mask. */
66 } __attribute__ ((packed));
67 __u64 value;
68};
69
70typedef union cr_itv cr_itv_t;
71
72#endif
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