[ce031f0] | 1 | /*
|
---|
| 2 | * Copyright (C) 2005 Jakub Jermar
|
---|
| 3 | * All rights reserved.
|
---|
| 4 | *
|
---|
| 5 | * Redistribution and use in source and binary forms, with or without
|
---|
| 6 | * modification, are permitted provided that the following conditions
|
---|
| 7 | * are met:
|
---|
| 8 | *
|
---|
| 9 | * - Redistributions of source code must retain the above copyright
|
---|
| 10 | * notice, this list of conditions and the following disclaimer.
|
---|
| 11 | * - Redistributions in binary form must reproduce the above copyright
|
---|
| 12 | * notice, this list of conditions and the following disclaimer in the
|
---|
| 13 | * documentation and/or other materials provided with the distribution.
|
---|
| 14 | * - The name of the author may not be used to endorse or promote products
|
---|
| 15 | * derived from this software without specific prior written permission.
|
---|
| 16 | *
|
---|
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
---|
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
---|
| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
---|
| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
---|
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
---|
| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
---|
| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
---|
| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
---|
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
---|
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
---|
| 27 | */
|
---|
| 28 |
|
---|
| 29 | #ifndef __ia64_TLB_H__
|
---|
| 30 | #define __ia64_TLB_H__
|
---|
| 31 |
|
---|
[b00fdde] | 32 | #define tlb_arch_init()
|
---|
| 33 | #define tlb_print()
|
---|
[ce031f0] | 34 |
|
---|
[bc78c75] | 35 | #include <arch/mm/page.h>
|
---|
| 36 | #include <arch/mm/asid.h>
|
---|
[2c49fbbe] | 37 | #include <arch/interrupt.h>
|
---|
| 38 | #include <arch/types.h>
|
---|
[95042fd] | 39 | #include <typedefs.h>
|
---|
| 40 |
|
---|
[a0d74fd] | 41 | /** Data and instruction Translation Register indices. */
|
---|
| 42 | #define DTR_KERNEL 0
|
---|
| 43 | #define ITR_KERNEL 0
|
---|
[b6d4566] | 44 | #define DTR_KSTACK1 1
|
---|
| 45 | #define DTR_KSTACK2 2
|
---|
[a0d74fd] | 46 |
|
---|
| 47 | /** Portion of TLB insertion format data structure. */
|
---|
| 48 | union tlb_entry {
|
---|
| 49 | __u64 word[2];
|
---|
| 50 | struct {
|
---|
| 51 | /* Word 0 */
|
---|
| 52 | unsigned p : 1; /**< Present. */
|
---|
| 53 | unsigned : 1;
|
---|
| 54 | unsigned ma : 3; /**< Memory attribute. */
|
---|
| 55 | unsigned a : 1; /**< Accessed. */
|
---|
| 56 | unsigned d : 1; /**< Dirty. */
|
---|
| 57 | unsigned pl : 2; /**< Privilege level. */
|
---|
| 58 | unsigned ar : 3; /**< Access rights. */
|
---|
| 59 | unsigned long long ppn : 38; /**< Physical Page Number, a.k.a. PFN. */
|
---|
| 60 | unsigned : 2;
|
---|
| 61 | unsigned ed : 1;
|
---|
| 62 | unsigned ig1 : 11;
|
---|
| 63 |
|
---|
| 64 | /* Word 1 */
|
---|
| 65 | unsigned : 2;
|
---|
| 66 | unsigned ps : 6; /**< Page size will be 2^ps. */
|
---|
| 67 | unsigned key : 24; /**< Protection key, unused. */
|
---|
| 68 | unsigned : 32;
|
---|
| 69 | } __attribute__ ((packed));
|
---|
| 70 | } __attribute__ ((packed));
|
---|
| 71 | typedef union tlb_entry tlb_entry_t;
|
---|
| 72 |
|
---|
| 73 | extern void tc_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, bool dtc);
|
---|
| 74 | extern void dtc_mapping_insert(__address va, asid_t asid, tlb_entry_t entry);
|
---|
| 75 | extern void itc_mapping_insert(__address va, asid_t asid, tlb_entry_t entry);
|
---|
[95042fd] | 76 |
|
---|
| 77 | extern void tr_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, bool dtr, index_t tr);
|
---|
| 78 | extern void dtr_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, index_t tr);
|
---|
| 79 | extern void itr_mapping_insert(__address va, asid_t asid, tlb_entry_t entry, index_t tr);
|
---|
| 80 |
|
---|
[9ad03fe] | 81 | extern void dtlb_kernel_mapping_insert(__address page, __address frame, bool dtr, index_t tr);
|
---|
[208259c] | 82 | extern void dtr_purge(__address page, count_t width);
|
---|
[9ad03fe] | 83 |
|
---|
| 84 | extern void dtc_pte_copy(pte_t *t);
|
---|
| 85 | extern void itc_pte_copy(pte_t *t);
|
---|
[a0d74fd] | 86 |
|
---|
[25d7709] | 87 | extern void alternate_instruction_tlb_fault(__u64 vector, istate_t *istate);
|
---|
| 88 | extern void alternate_data_tlb_fault(__u64 vector, istate_t *istate);
|
---|
| 89 | extern void data_nested_tlb_fault(__u64 vector, istate_t *istate);
|
---|
| 90 | extern void data_dirty_bit_fault(__u64 vector, istate_t *istate);
|
---|
| 91 | extern void instruction_access_bit_fault(__u64 vector, istate_t *istate);
|
---|
| 92 | extern void data_access_bit_fault(__u64 vector, istate_t *istate);
|
---|
| 93 | extern void page_not_present(__u64 vector, istate_t *istate);
|
---|
[bc78c75] | 94 |
|
---|
[ce031f0] | 95 | #endif
|
---|