source: mainline/arch/ia64/include/context.h@ 22f7769

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 22f7769 was 22f7769, checked in by Jakub Jermar <jakub@…>, 20 years ago

Rename cpu_priority_{high|low|restore|read} functions to interrupts_{disable|enable|restore|read}.
Rename pri_t to ipl_t (Interrupt Priority Level).
Rename thread_t::pri to thread_t::priority.

  • Property mode set to 100644
File size: 2.6 KB
RevLine 
[30ef8ce]1/*
2 * Copyright (C) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __ia64_CONTEXT_H__
30#define __ia64_CONTEXT_H__
31
32#include <arch/types.h>
[e0cdb7b6]33#include <align.h>
[30ef8ce]34
[1fbbcd6]35#define STACK_ITEM_SIZE 16
[e0cdb7b6]36#define STACK_ALIGNMENT 16
[1fbbcd6]37
[6b96ab44]38/*
39 * context_save() and context_restore() are both leaf procedures.
40 * No need to allocate scratch area.
[1fbbcd6]41 *
42 * One item is put onto the stack to support get_stack_base().
[6b96ab44]43 */
[1fbbcd6]44#define SP_DELTA (0+STACK_ITEM_SIZE)
[7f1bfce]45
[d5d2a3f]46#ifdef context_set
47#undef context_set
48#endif
49
[e0cdb7b6]50#define context_set(c, _pc, stack, size) \
51 (c)->pc = (__address) _pc; \
[a016b63]52 (c)->bsp = ((__address) stack) + ALIGN(sizeof(the_t), STACK_ALIGNMENT); \
53 (c)->sp = ((__address) stack) + ALIGN((size) - SP_DELTA, STACK_ALIGNMENT);
[d5d2a3f]54
[7b43e11]55/*
56 * Only save registers that must be preserved across
57 * function calls.
58 */
[30ef8ce]59struct context {
[32a89bf]60
61 /*
62 * Application registers
63 */
64 __u64 ar_pfs;
65 __u64 ar_unat_caller;
66 __u64 ar_unat_callee;
67 __u64 ar_rsc;
[d5d2a3f]68 __u64 bsp; /* ar_bsp */
[32a89bf]69 __u64 ar_rnat;
70 __u64 ar_lc;
[1eee8383]71
[6b96ab44]72 /*
73 * General registers
74 */
[9db5b66]75 __u64 r1;
76 __u64 r4;
77 __u64 r5;
78 __u64 r6;
79 __u64 r7;
80 __u64 sp; /* r12 */
81 __u64 r13;
[6b96ab44]82
83 /*
84 * Branch registers
85 */
[9db5b66]86 __u64 pc; /* b0 */
[6b96ab44]87 __u64 b1;
88 __u64 b2;
89 __u64 b3;
90 __u64 b4;
91 __u64 b5;
92
93 /*
94 * Predicate registers
95 */
96 __u64 pr;
97
[22f7769]98 ipl_t ipl;
[9db5b66]99} __attribute__ ((packed));
[30ef8ce]100
101#endif
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