source: mainline/arch/ia32/src/smp/smp.c@ e16e036a

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export 0.1.0
Last change on this file since e16e036a was e16e036a, checked in by Martin Decky <martin@…>, 20 years ago

major build system revision (unfinished)
this patchset most definitively breaks a lot of things, be patient

  • Property mode set to 100644
File size: 5.0 KB
RevLine 
[ed0dd65]1/*
2 * Copyright (C) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <smp/smp.h>
[a26ddd1]30#include <arch/smp/smp.h>
31#include <arch/smp/mps.h>
32#include <arch/smp/ap.h>
[e16e036a]33#include <genarch/acpi/acpi.h>
34#include <genarch/acpi/madt.h>
[ed0dd65]35#include <config.h>
[a26ddd1]36#include <synch/waitq.h>
[6153749]37#include <synch/synch.h>
[a26ddd1]38#include <arch/pm.h>
39#include <func.h>
40#include <panic.h>
41#include <debug.h>
42#include <arch/asm.h>
43#include <mm/frame.h>
44#include <mm/page.h>
45#include <mm/heap.h>
[9c0a9b3]46#include <print.h>
47#include <memstr.h>
48#include <arch/i8259.h>
[ed0dd65]49
50#ifdef __SMP__
51
[a26ddd1]52static struct smp_config_operations *ops = NULL;
53
[ed0dd65]54void smp_init(void)
55{
56 if (acpi_madt) {
57 acpi_madt_parse();
[232e3ec7]58 ops = &madt_config_operations;
[ed0dd65]59 }
[a26ddd1]60 if (config.cpu_count == 1) {
[ed0dd65]61 mps_init();
[a26ddd1]62 ops = &mps_config_operations;
63 }
[7d365305]64
[946b630]65 if (config.cpu_count > 1) {
66 map_page_to_frame((__address)l_apic, (__address)l_apic,
[776c91a]67 PAGE_NOT_CACHEABLE, 0);
[946b630]68 map_page_to_frame((__address) io_apic,
69 (__address) io_apic,
[776c91a]70 PAGE_NOT_CACHEABLE, 0);
[7d365305]71 }
72
73 /*
74 * Must be initialized outside the kmp thread, since it is waited
75 * on before the kmp thread is created.
76 */
77 waitq_initialize(&kmp_completion_wq);
78
[ed0dd65]79}
80
[a26ddd1]81/*
82 * Kernel thread for bringing up application processors. It becomes clear
83 * that we need an arrangement like this (AP's being initialized by a kernel
84 * thread), for a thread has its dedicated stack. (The stack used during the
85 * BSP initialization (prior the very first call to scheduler()) will be used
86 * as an initialization stack for each AP.)
87 */
88void kmp(void *arg)
89{
90 __address src, dst;
91 int i;
[6401f79]92
[a26ddd1]93 ASSERT(ops != NULL);
94
95 waitq_initialize(&ap_completion_wq);
96
97 /*
98 * We need to access data in frame 0.
99 * We boldly make use of kernel address space mapping.
100 */
101
102 /*
103 * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
104 */
105 *((__u16 *) (PA2KA(0x467+0))) = ((__address) ap_boot) >> 4; /* segment */
106 *((__u16 *) (PA2KA(0x467+2))) = 0; /* offset */
107
108 /*
109 * Save 0xa to address 0xf of the CMOS RAM.
110 * BIOS will not do the POST after the INIT signal.
111 */
112 outb(0x70,0xf);
113 outb(0x71,0xa);
114
115 pic_disable_irqs(0xffff);
116 apic_init();
117
118 for (i = 0; i < ops->cpu_count(); i++) {
119 struct descriptor *gdt_new;
120
121 /*
122 * Skip processors marked unusable.
123 */
124 if (!ops->cpu_enabled(i))
125 continue;
126
127 /*
128 * The bootstrap processor is already up.
129 */
130 if (ops->cpu_bootstrap(i))
131 continue;
132
133 if (ops->cpu_apic_id(i) == l_apic_id()) {
[6153749]134 printf("%s: bad processor entry #%d, will not send IPI to myself\n", __FUNCTION__, i);
[a26ddd1]135 continue;
136 }
137
138 /*
139 * Prepare new GDT for CPU in question.
140 */
141 if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor))))
142 panic("couldn't allocate memory for GDT\n");
143
[9756131]144 memcpy(gdt_new, gdt, GDT_ITEMS*sizeof(struct descriptor));
[9c0a9b3]145 memsetb((__address)(&gdt_new[TSS_DES]), sizeof(struct descriptor), 0);
[8f2153b]146 real_bootstrap_gdtr.base = KA2PA((__address) gdt_new);
[6401f79]147 gdtr.base = (__address) gdt_new;
[a26ddd1]148
149 if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) {
150 /*
[c0b45fa]151 * There may be just one AP being initialized at
[a26ddd1]152 * the time. After it comes completely up, it is
153 * supposed to wake us up.
[c0b45fa]154 */
[6153749]155 if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_BLOCKING) == ESYNCH_TIMEOUT)
156 printf("%s: waiting for cpu%d (APIC ID = %d) timed out\n", __FUNCTION__, config.cpu_active > i ? config.cpu_active : i, ops->cpu_apic_id(i));
[c0b45fa]157 } else
[a26ddd1]158 printf("INIT IPI for l_apic%d failed\n", ops->cpu_apic_id(i));
159 }
160
161 /*
162 * Wakeup the kinit thread so that
163 * system initialization can go on.
164 */
165 waitq_wakeup(&kmp_completion_wq, WAKEUP_FIRST);
166}
[ed0dd65]167
168#endif /* __SMP__ */
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