source: mainline/arch/ia32/src/smp/mps.c@ 631ca4d

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 631ca4d was 5a95b25, checked in by Ondrej Palkovsky <ondrap@…>, 20 years ago

Cleanups to make it compile with -Wall. Did not catch everything yet.
  • Property mode set to 100644
File size: 10.2 KB
Line 
1/*
2 * Copyright (C) 2001-2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifdef CONFIG_SMP
30
31#include <config.h>
32#include <print.h>
33#include <debug.h>
34#include <arch/smp/mps.h>
35#include <arch/smp/apic.h>
36#include <arch/smp/smp.h>
37#include <func.h>
38#include <arch/types.h>
39#include <typedefs.h>
40#include <cpu.h>
41#include <arch/asm.h>
42#include <arch/bios/bios.h>
43#include <mm/frame.h>
44
45/*
46 * MultiProcessor Specification detection code.
47 */
48
49#define FS_SIGNATURE 0x5f504d5f
50#define CT_SIGNATURE 0x504d4350
51
52int mps_fs_check(__u8 *base);
53int mps_ct_check(void);
54
55int configure_via_ct(void);
56int configure_via_default(__u8 n);
57
58int ct_processor_entry(struct __processor_entry *pr);
59void ct_bus_entry(struct __bus_entry *bus);
60void ct_io_apic_entry(struct __io_apic_entry *ioa);
61void ct_io_intr_entry(struct __io_intr_entry *iointr);
62void ct_l_intr_entry(struct __l_intr_entry *lintr);
63
64void ct_extended_entries(void);
65
66static struct mps_fs *fs;
67static struct mps_ct *ct;
68
69struct __processor_entry *processor_entries = NULL;
70struct __bus_entry *bus_entries = NULL;
71struct __io_apic_entry *io_apic_entries = NULL;
72struct __io_intr_entry *io_intr_entries = NULL;
73struct __l_intr_entry *l_intr_entries = NULL;
74
75int processor_entry_cnt = 0;
76int bus_entry_cnt = 0;
77int io_apic_entry_cnt = 0;
78int io_intr_entry_cnt = 0;
79int l_intr_entry_cnt = 0;
80
81waitq_t ap_completion_wq;
82waitq_t kmp_completion_wq;
83
84
85/*
86 * Implementation of IA-32 SMP configuration interface.
87 */
88static count_t get_cpu_count(void);
89static bool is_cpu_enabled(index_t i);
90static bool is_bsp(index_t i);
91static __u8 get_cpu_apic_id(index_t i);
92static int mps_irq_to_pin(int irq);
93
94struct smp_config_operations mps_config_operations = {
95 .cpu_count = get_cpu_count,
96 .cpu_enabled = is_cpu_enabled,
97 .cpu_bootstrap = is_bsp,
98 .cpu_apic_id = get_cpu_apic_id,
99 .irq_to_pin = mps_irq_to_pin
100};
101
102count_t get_cpu_count(void)
103{
104 return processor_entry_cnt;
105}
106
107bool is_cpu_enabled(index_t i)
108{
109 ASSERT(i < processor_entry_cnt);
110 return processor_entries[i].cpu_flags & 0x1;
111}
112
113bool is_bsp(index_t i)
114{
115 ASSERT(i < processor_entry_cnt);
116 return processor_entries[i].cpu_flags & 0x2;
117}
118
119__u8 get_cpu_apic_id(index_t i)
120{
121 ASSERT(i < processor_entry_cnt);
122 return processor_entries[i].l_apic_id;
123}
124
125
126/*
127 * Used to check the integrity of the MP Floating Structure.
128 */
129int mps_fs_check(__u8 *base)
130{
131 int i;
132 __u8 sum;
133
134 for (i = 0, sum = 0; i < 16; i++)
135 sum += base[i];
136
137 return !sum;
138}
139
140/*
141 * Used to check the integrity of the MP Configuration Table.
142 */
143int mps_ct_check(void)
144{
145 __u8 *base = (__u8 *) ct;
146 __u8 *ext = base + ct->base_table_length;
147 __u8 sum;
148 int i;
149
150 /* count the checksum for the base table */
151 for (i=0,sum=0; i < ct->base_table_length; i++)
152 sum += base[i];
153
154 if (sum)
155 return 0;
156
157 /* count the checksum for the extended table */
158 for (i=0,sum=0; i < ct->ext_table_length; i++)
159 sum += ext[i];
160
161 return sum == ct->ext_table_checksum;
162}
163
164void mps_init(void)
165{
166 __u8 *addr[2] = { NULL, (__u8 *) PA2KA(0xf0000) };
167 int i, j, length[2] = { 1024, 64*1024 };
168
169
170 /*
171 * Find MP Floating Pointer Structure
172 * 1a. search first 1K of EBDA
173 * 1b. if EBDA is undefined, search last 1K of base memory
174 * 2. search 64K starting at 0xf0000
175 */
176
177 addr[0] = (__u8 *) PA2KA(ebda ? ebda : 639 * 1024);
178 for (i = 0; i < 2; i++) {
179 for (j = 0; j < length[i]; j += 16) {
180 if (*((__u32 *) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) {
181 fs = (struct mps_fs *) &addr[i][j];
182 goto fs_found;
183 }
184 }
185 }
186
187 return;
188
189fs_found:
190 printf("%P: MPS Floating Pointer Structure\n", fs);
191
192 if (fs->config_type == 0 && fs->configuration_table) {
193 if (fs->mpfib2 >> 7) {
194 printf("%s: PIC mode not supported\n", __FUNCTION__);
195 return;
196 }
197
198 ct = (struct mps_ct *)PA2KA((__address)fs->configuration_table);
199 config.cpu_count = configure_via_ct();
200 }
201 else
202 config.cpu_count = configure_via_default(fs->config_type);
203
204 return;
205}
206
207int configure_via_ct(void)
208{
209 __u8 *cur;
210 int i, cnt;
211
212 if (ct->signature != CT_SIGNATURE) {
213 printf("%s: bad ct->signature\n", __FUNCTION__);
214 return 1;
215 }
216 if (!mps_ct_check()) {
217 printf("%s: bad ct checksum\n", __FUNCTION__);
218 return 1;
219 }
220 if (ct->oem_table) {
221 printf("%s: ct->oem_table not supported\n", __FUNCTION__);
222 return 1;
223 }
224
225 l_apic = (__u32 *)(__address)ct->l_apic;
226
227 cnt = 0;
228 cur = &ct->base_table[0];
229 for (i=0; i < ct->entry_count; i++) {
230 switch (*cur) {
231 /* Processor entry */
232 case 0:
233 processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;
234 processor_entry_cnt++;
235 cnt += ct_processor_entry((struct __processor_entry *) cur);
236 cur += 20;
237 break;
238
239 /* Bus entry */
240 case 1:
241 bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;
242 bus_entry_cnt++;
243 ct_bus_entry((struct __bus_entry *) cur);
244 cur += 8;
245 break;
246
247 /* I/O Apic */
248 case 2:
249 io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;
250 io_apic_entry_cnt++;
251 ct_io_apic_entry((struct __io_apic_entry *) cur);
252 cur += 8;
253 break;
254
255 /* I/O Interrupt Assignment */
256 case 3:
257 io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;
258 io_intr_entry_cnt++;
259 ct_io_intr_entry((struct __io_intr_entry *) cur);
260 cur += 8;
261 break;
262
263 /* Local Interrupt Assignment */
264 case 4:
265 l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;
266 l_intr_entry_cnt++;
267 ct_l_intr_entry((struct __l_intr_entry *) cur);
268 cur += 8;
269 break;
270
271 default:
272 /*
273 * Something is wrong. Fallback to UP mode.
274 */
275
276 printf("%s: ct badness\n", __FUNCTION__);
277 return 1;
278 }
279 }
280
281 /*
282 * Process extended entries.
283 */
284 ct_extended_entries();
285 return cnt;
286}
287
288int configure_via_default(__u8 n)
289{
290 /*
291 * Not yet implemented.
292 */
293 printf("%s: not supported\n", __FUNCTION__);
294 return 1;
295}
296
297
298int ct_processor_entry(struct __processor_entry *pr)
299{
300 /*
301 * Ignore processors which are not marked enabled.
302 */
303 if ((pr->cpu_flags & (1<<0)) == 0)
304 return 0;
305
306 apic_id_mask |= (1<<pr->l_apic_id);
307 return 1;
308}
309
310void ct_bus_entry(struct __bus_entry *bus)
311{
312#ifdef MPSCT_VERBOSE
313 char buf[7];
314 memcpy((void *) buf, (void *) bus->bus_type, 6);
315 buf[6] = 0;
316 printf("bus%d: %s\n", bus->bus_id, buf);
317#endif
318}
319
320void ct_io_apic_entry(struct __io_apic_entry *ioa)
321{
322 static int io_apic_count = 0;
323
324 /* this ioapic is marked unusable */
325 if ((ioa->io_apic_flags & 1) == 0)
326 return;
327
328 if (io_apic_count++ > 0) {
329 /*
330 * Multiple IO APIC's are currently not supported.
331 */
332 return;
333 }
334
335 io_apic = (__u32 *)(__address)ioa->io_apic;
336}
337
338//#define MPSCT_VERBOSE
339void ct_io_intr_entry(struct __io_intr_entry *iointr)
340{
341#ifdef MPSCT_VERBOSE
342 switch (iointr->intr_type) {
343 case 0: printf("INT"); break;
344 case 1: printf("NMI"); break;
345 case 2: printf("SMI"); break;
346 case 3: printf("ExtINT"); break;
347 }
348 putchar(',');
349 switch (iointr->poel&3) {
350 case 0: printf("bus-like"); break;
351 case 1: printf("active high"); break;
352 case 2: printf("reserved"); break;
353 case 3: printf("active low"); break;
354 }
355 putchar(',');
356 switch ((iointr->poel>>2)&3) {
357 case 0: printf("bus-like"); break;
358 case 1: printf("edge-triggered"); break;
359 case 2: printf("reserved"); break;
360 case 3: printf("level-triggered"); break;
361 }
362 putchar(',');
363 printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);
364 putchar(',');
365 printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);
366 putchar('\n');
367#endif
368}
369
370void ct_l_intr_entry(struct __l_intr_entry *lintr)
371{
372#ifdef MPSCT_VERBOSE
373 switch (lintr->intr_type) {
374 case 0: printf("INT"); break;
375 case 1: printf("NMI"); break;
376 case 2: printf("SMI"); break;
377 case 3: printf("ExtINT"); break;
378 }
379 putchar(',');
380 switch (lintr->poel&3) {
381 case 0: printf("bus-like"); break;
382 case 1: printf("active high"); break;
383 case 2: printf("reserved"); break;
384 case 3: printf("active low"); break;
385 }
386 putchar(',');
387 switch ((lintr->poel>>2)&3) {
388 case 0: printf("bus-like"); break;
389 case 1: printf("edge-triggered"); break;
390 case 2: printf("reserved"); break;
391 case 3: printf("level-triggered"); break;
392 }
393 putchar(',');
394 printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);
395 putchar(',');
396 printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);
397 putchar('\n');
398#endif
399}
400
401void ct_extended_entries(void)
402{
403 __u8 *ext = (__u8 *) ct + ct->base_table_length;
404 __u8 *cur;
405
406 for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {
407 switch (cur[CT_EXT_ENTRY_TYPE]) {
408 default:
409 printf("%P: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);
410 break;
411 }
412 }
413}
414
415int mps_irq_to_pin(int irq)
416{
417 int i;
418
419 for(i=0;i<io_intr_entry_cnt;i++) {
420 if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)
421 return io_intr_entries[i].dst_io_apic_pin;
422 }
423
424 return -1;
425}
426
427#endif /* CONFIG_SMP */
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