source: mainline/arch/ia32/src/interrupt.c@ cf85e24c

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since cf85e24c was cf85e24c, checked in by Martin Decky <martin@…>, 19 years ago

printf-related and other code cleanup

  • Property mode set to 100644
File size: 4.3 KB
RevLine 
[f761f1eb]1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <arch/interrupt.h>
[204674e]30#include <syscall/syscall.h>
[f761f1eb]31#include <print.h>
[02a99d2]32#include <debug.h>
[f761f1eb]33#include <panic.h>
34#include <arch/i8259.h>
35#include <func.h>
36#include <cpu.h>
37#include <arch/asm.h>
[169587a]38#include <mm/tlb.h>
[20d50a1]39#include <mm/as.h>
[cb4b61d]40#include <arch.h>
[ab08b42]41#include <symtab.h>
[1084a784]42#include <proc/thread.h>
[f761f1eb]43
44/*
45 * Interrupt and exception dispatching.
46 */
47
48void (* disable_irqs_function)(__u16 irqmask) = NULL;
49void (* enable_irqs_function)(__u16 irqmask) = NULL;
50void (* eoi_function)(void) = NULL;
51
[97b64c9]52static void PRINT_INFO_ERRCODE(istate_t *istate)
53{
54 char *symbol = get_symtab_entry(istate->eip);
55
56 if (!symbol)
57 symbol = "";
58
59 if (CPU)
60 printf("----------------EXCEPTION OCCURED (cpu%d)----------------\n", CPU->id);
61 else
62 printf("----------------EXCEPTION OCCURED----------------\n");
63
[cf85e24c]64 printf("%%eip: %#x (%s)\n",istate->eip,symbol);
65 printf("ERROR_WORD=%#x\n", istate->error_word);
66 printf("%%cs=%#x,flags=%#x\n", istate->cs, istate->eflags);
67 printf("%%eax=%#x, %%ecx=%#x, %%edx=%#x, %%esp=%#x\n", istate->eax,istate->ecx,istate->edx,&istate->stack[0]);
[53f9821]68#ifdef CONFIG_DEBUG_ALLREGS
[cf85e24c]69 printf("%%esi=%#x, %%edi=%#x, %%ebp=%#x, %%ebx=%#x\n", istate->esi,istate->edi,istate->ebp,istate->ebx);
[53f9821]70#endif
[cf85e24c]71 printf("stack: %#x, %#x, %#x, %#x\n", istate->stack[0], istate->stack[1], istate->stack[2], istate->stack[3]);
72 printf(" %#x, %#x, %#x, %#x\n", istate->stack[4], istate->stack[5], istate->stack[6], istate->stack[7]);
[97b64c9]73}
[ab08b42]74
[25d7709]75void null_interrupt(int n, istate_t *istate)
[f761f1eb]76{
[25d7709]77 PRINT_INFO_ERRCODE(istate);
78 panic("unserviced interrupt: %d\n", n);
[f761f1eb]79}
80
[25d7709]81void gp_fault(int n, istate_t *istate)
[f761f1eb]82{
[25d7709]83 PRINT_INFO_ERRCODE(istate);
[f4a61ef]84 panic("general protection fault\n");
[f761f1eb]85}
86
[25d7709]87void ss_fault(int n, istate_t *istate)
[6de2480e]88{
[25d7709]89 PRINT_INFO_ERRCODE(istate);
[747a2476]90 panic("stack fault\n");
[6de2480e]91}
92
[3b05862f]93void simd_fp_exception(int n, istate_t *istate)
94{
95
96 PRINT_INFO_ERRCODE(istate);
97 __u32 mxcsr;
98 asm
99 (
100 "stmxcsr %0;\n"
101 :"=m"(mxcsr)
102 );
[280a27e]103 printf("MXCSR: %#zX\n",(__native)(mxcsr));
[3b05862f]104 panic("SIMD FP exception(19)\n");
105}
106
[25d7709]107void nm_fault(int n, istate_t *istate)
[6a27d63]108{
[5f85c91]109#ifdef CONFIG_FPU_LAZY
[b49f4ae]110 scheduler_fpu_lazy_request();
111#else
112 panic("fpu fault");
113#endif
[6a27d63]114}
115
[25d7709]116void page_fault(int n, istate_t *istate)
[f761f1eb]117{
[20d50a1]118 __address page;
119
120 page = read_cr2();
121 if (!as_page_fault(page)) {
[25d7709]122 PRINT_INFO_ERRCODE(istate);
[cf85e24c]123 printf("page fault address: %#x\n", page);
[20d50a1]124 panic("page fault\n");
125 }
[f761f1eb]126}
127
[25d7709]128void syscall(int n, istate_t *istate)
[f761f1eb]129{
[53f9821]130 panic("Obsolete syscall handler.");
[f761f1eb]131}
132
[25d7709]133void tlb_shootdown_ipi(int n, istate_t *istate)
[169587a]134{
135 trap_virtual_eoi();
[b109ebb]136 tlb_shootdown_ipi_recv();
[169587a]137}
138
[f761f1eb]139void trap_virtual_enable_irqs(__u16 irqmask)
140{
141 if (enable_irqs_function)
142 enable_irqs_function(irqmask);
143 else
[02a99d2]144 panic("no enable_irqs_function\n");
[f761f1eb]145}
146
147void trap_virtual_disable_irqs(__u16 irqmask)
148{
149 if (disable_irqs_function)
150 disable_irqs_function(irqmask);
151 else
[02a99d2]152 panic("no disable_irqs_function\n");
[f761f1eb]153}
154
155void trap_virtual_eoi(void)
156{
157 if (eoi_function)
158 eoi_function();
159 else
[02a99d2]160 panic("no eoi_function\n");
[f761f1eb]161
162}
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