[f761f1eb] | 1 | /*
|
---|
| 2 | * Copyright (C) 2001-2004 Jakub Jermar
|
---|
| 3 | * All rights reserved.
|
---|
| 4 | *
|
---|
| 5 | * Redistribution and use in source and binary forms, with or without
|
---|
| 6 | * modification, are permitted provided that the following conditions
|
---|
| 7 | * are met:
|
---|
| 8 | *
|
---|
| 9 | * - Redistributions of source code must retain the above copyright
|
---|
| 10 | * notice, this list of conditions and the following disclaimer.
|
---|
| 11 | * - Redistributions in binary form must reproduce the above copyright
|
---|
| 12 | * notice, this list of conditions and the following disclaimer in the
|
---|
| 13 | * documentation and/or other materials provided with the distribution.
|
---|
| 14 | * - The name of the author may not be used to endorse or promote products
|
---|
| 15 | * derived from this software without specific prior written permission.
|
---|
| 16 | *
|
---|
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
---|
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
---|
| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
---|
| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
---|
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
---|
| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
---|
| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
---|
| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
---|
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
---|
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
---|
| 27 | */
|
---|
| 28 |
|
---|
| 29 | #include <arch/interrupt.h>
|
---|
| 30 | #include <print.h>
|
---|
[02a99d2] | 31 | #include <debug.h>
|
---|
[f761f1eb] | 32 | #include <panic.h>
|
---|
| 33 | #include <arch/i8259.h>
|
---|
| 34 | #include <func.h>
|
---|
| 35 | #include <cpu.h>
|
---|
| 36 | #include <arch/asm.h>
|
---|
[169587a] | 37 | #include <mm/tlb.h>
|
---|
[cb4b61d] | 38 | #include <arch.h>
|
---|
[f761f1eb] | 39 |
|
---|
| 40 | /*
|
---|
| 41 | * Interrupt and exception dispatching.
|
---|
| 42 | */
|
---|
| 43 |
|
---|
| 44 | static iroutine ivt[IVT_ITEMS];
|
---|
| 45 |
|
---|
| 46 | void (* disable_irqs_function)(__u16 irqmask) = NULL;
|
---|
| 47 | void (* enable_irqs_function)(__u16 irqmask) = NULL;
|
---|
| 48 | void (* eoi_function)(void) = NULL;
|
---|
| 49 |
|
---|
| 50 | iroutine trap_register(__u8 n, iroutine f)
|
---|
| 51 | {
|
---|
[02a99d2] | 52 | ASSERT(n < IVT_ITEMS);
|
---|
| 53 |
|
---|
[f761f1eb] | 54 | iroutine old;
|
---|
[02a99d2] | 55 |
|
---|
[f761f1eb] | 56 | old = ivt[n];
|
---|
| 57 | ivt[n] = f;
|
---|
[02a99d2] | 58 |
|
---|
| 59 | return old;
|
---|
[f761f1eb] | 60 | }
|
---|
| 61 |
|
---|
| 62 | /*
|
---|
| 63 | * Called directly from the assembler code.
|
---|
| 64 | * CPU is cpu_priority_high().
|
---|
| 65 | */
|
---|
| 66 | void trap_dispatcher(__u8 n, __u32 stack[])
|
---|
| 67 | {
|
---|
[02a99d2] | 68 | ASSERT(n < IVT_ITEMS);
|
---|
| 69 |
|
---|
| 70 | ivt[n](n, stack);
|
---|
[f761f1eb] | 71 | }
|
---|
| 72 |
|
---|
| 73 | void null_interrupt(__u8 n, __u32 stack[])
|
---|
| 74 | {
|
---|
| 75 | printf("int %d: null_interrupt\n", n);
|
---|
| 76 | printf("stack: %L, %L, %L, %L\n", stack[0], stack[1], stack[2], stack[3]);
|
---|
| 77 | panic("unserviced interrupt\n");
|
---|
| 78 | }
|
---|
| 79 |
|
---|
| 80 | void gp_fault(__u8 n, __u32 stack[])
|
---|
| 81 | {
|
---|
| 82 | printf("stack[0]=%X, %%eip=%X, %%cs=%X, flags=%X\n", stack[0], stack[1], stack[2], stack[3]);
|
---|
| 83 | printf("%%eax=%L, %%ebx=%L, %%ecx=%L, %%edx=%L,\n%%edi=%L, %%esi=%L, %%ebp=%L, %%esp=%L\n", stack[-2], stack[-5], stack[-3], stack[-4], stack[-9], stack[-8], stack[-1], stack);
|
---|
| 84 | printf("stack: %X, %X, %X, %X\n", stack[4], stack[5], stack[6], stack[7]);
|
---|
| 85 | panic("general protection fault\n");
|
---|
| 86 | }
|
---|
| 87 |
|
---|
[6de2480e] | 88 | void ss_fault(__u8 n, __u32 stack[])
|
---|
| 89 | {
|
---|
| 90 | printf("stack[0]=%X, %%eip=%X, %%cs=%X, flags=%X\n", stack[0], stack[1], stack[2], stack[3]);
|
---|
| 91 | printf("%%eax=%L, %%ebx=%L, %%ecx=%L, %%edx=%L,\n%%edi=%L, %%esi=%L, %%ebp=%L, %%esp=%L\n", stack[-2], stack[-5], stack[-3], stack[-4], stack[-9], stack[-8], stack[-1], stack);
|
---|
| 92 | printf("stack: %X, %X, %X, %X\n", stack[4], stack[5], stack[6], stack[7]);
|
---|
[747a2476] | 93 | panic("stack fault\n");
|
---|
[6de2480e] | 94 | }
|
---|
| 95 |
|
---|
| 96 |
|
---|
[6a27d63] | 97 | void nm_fault(__u8 n, __u32 stack[])
|
---|
| 98 | {
|
---|
[6de2480e] | 99 | reset_TS_flag();
|
---|
[ea3fb2e] | 100 | if ((CPU->fpu_owner)!=NULL)
|
---|
[6a27d63] | 101 | {
|
---|
[6de2480e] | 102 | fpu_lazy_context_save(&((CPU->fpu_owner)->saved_fpu_context));
|
---|
[54ca3523] | 103 | (CPU->fpu_owner)->fpu_context_engaged=0; /* don't prevent migration */
|
---|
[6a27d63] | 104 | }
|
---|
| 105 | if(THREAD->fpu_context_exists) fpu_lazy_context_restore(&(THREAD->saved_fpu_context));
|
---|
| 106 | else {fpu_init();THREAD->fpu_context_exists=1;}
|
---|
[ea3fb2e] | 107 | CPU->fpu_owner=THREAD;
|
---|
[6a27d63] | 108 | }
|
---|
| 109 |
|
---|
| 110 |
|
---|
| 111 |
|
---|
[f761f1eb] | 112 | void page_fault(__u8 n, __u32 stack[])
|
---|
| 113 | {
|
---|
[18e0a6c] | 114 | printf("page fault address: %X\n", read_cr2());
|
---|
[f761f1eb] | 115 | printf("stack[0]=%X, %%eip=%X, %%cs=%X, flags=%X\n", stack[0], stack[1], stack[2], stack[3]);
|
---|
| 116 | printf("%%eax=%L, %%ebx=%L, %%ecx=%L, %%edx=%L,\n%%edi=%L, %%esi=%L, %%ebp=%L, %%esp=%L\n", stack[-2], stack[-5], stack[-3], stack[-4], stack[-9], stack[-8], stack[-1], stack);
|
---|
| 117 | printf("stack: %X, %X, %X, %X\n", stack[4], stack[5], stack[6], stack[7]);
|
---|
[87cd61f] | 118 | panic("page fault\n");
|
---|
[f761f1eb] | 119 | }
|
---|
| 120 |
|
---|
| 121 | void syscall(__u8 n, __u32 stack[])
|
---|
| 122 | {
|
---|
[cb4b61d] | 123 | printf("cpu%d: syscall\n", CPU->id);
|
---|
[434f700] | 124 | thread_usleep(1000);
|
---|
[f761f1eb] | 125 | }
|
---|
| 126 |
|
---|
[b109ebb] | 127 | void tlb_shootdown_ipi(__u8 n, __u32 stack[])
|
---|
[169587a] | 128 | {
|
---|
| 129 | trap_virtual_eoi();
|
---|
[b109ebb] | 130 | tlb_shootdown_ipi_recv();
|
---|
[169587a] | 131 | }
|
---|
| 132 |
|
---|
[4ffa9e0] | 133 | void wakeup_ipi(__u8 n, __u32 stack[])
|
---|
| 134 | {
|
---|
| 135 | trap_virtual_eoi();
|
---|
| 136 | }
|
---|
| 137 |
|
---|
[f761f1eb] | 138 | void trap_virtual_enable_irqs(__u16 irqmask)
|
---|
| 139 | {
|
---|
| 140 | if (enable_irqs_function)
|
---|
| 141 | enable_irqs_function(irqmask);
|
---|
| 142 | else
|
---|
[02a99d2] | 143 | panic("no enable_irqs_function\n");
|
---|
[f761f1eb] | 144 | }
|
---|
| 145 |
|
---|
| 146 | void trap_virtual_disable_irqs(__u16 irqmask)
|
---|
| 147 | {
|
---|
| 148 | if (disable_irqs_function)
|
---|
| 149 | disable_irqs_function(irqmask);
|
---|
| 150 | else
|
---|
[02a99d2] | 151 | panic("no disable_irqs_function\n");
|
---|
[f761f1eb] | 152 | }
|
---|
| 153 |
|
---|
| 154 | void trap_virtual_eoi(void)
|
---|
| 155 | {
|
---|
| 156 | if (eoi_function)
|
---|
| 157 | eoi_function();
|
---|
| 158 | else
|
---|
[02a99d2] | 159 | panic("no eoi_function\n");
|
---|
[f761f1eb] | 160 |
|
---|
| 161 | }
|
---|