source: mainline/arch/ia32/src/interrupt.c@ 5f85c91

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 5f85c91 was 5f85c91, checked in by Martin Decky <martin@…>, 20 years ago

make configuration variables usage consistent

  • Property mode set to 100644
File size: 4.2 KB
RevLine 
[f761f1eb]1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <arch/interrupt.h>
30#include <print.h>
[02a99d2]31#include <debug.h>
[f761f1eb]32#include <panic.h>
33#include <arch/i8259.h>
34#include <func.h>
35#include <cpu.h>
36#include <arch/asm.h>
[169587a]37#include <mm/tlb.h>
[cb4b61d]38#include <arch.h>
[ab08b42]39#include <symtab.h>
[1084a784]40#include <proc/thread.h>
[f761f1eb]41
42/*
43 * Interrupt and exception dispatching.
44 */
45
46static iroutine ivt[IVT_ITEMS];
47
48void (* disable_irqs_function)(__u16 irqmask) = NULL;
49void (* enable_irqs_function)(__u16 irqmask) = NULL;
50void (* eoi_function)(void) = NULL;
51
[ab08b42]52#define PRINT_INFO_ERRCODE(x) { \
53 char *symbol = get_symtab_entry(stack[1]); \
54 if (!symbol) \
55 symbol = ""; \
56 printf("----------------EXCEPTION OCCURED----------------\n"); \
57 printf("%%eip: %X (%s)\n",x[1],symbol); \
58 printf("ERROR_WORD=%X\n", x[0]); \
59 printf("%%cs=%X,flags=%X\n", x[2], x[3]); \
60 printf("%%eax=%X, %%ebx=%X, %%ecx=%X, %%edx=%X\n",\
61 x[-2],x[-5],x[-3],x[-4]); \
62 printf("%%esi=%X, %%edi=%X, %%ebp=%X, %%esp=%X\n",\
63 x[-8],x[-9],x[-1],x); \
64 printf("stack: %X, %X, %X, %X\n", x[4], x[5], x[6], x[7]); \
65 printf(" %X, %X, %X, %X\n", x[8], x[9], x[10], x[11]); \
66 }
67
[f761f1eb]68iroutine trap_register(__u8 n, iroutine f)
69{
[02a99d2]70 ASSERT(n < IVT_ITEMS);
71
[f761f1eb]72 iroutine old;
[02a99d2]73
[f761f1eb]74 old = ivt[n];
75 ivt[n] = f;
[02a99d2]76
77 return old;
[f761f1eb]78}
79
80/*
81 * Called directly from the assembler code.
[22f7769]82 * CPU is interrupts_disable()'d.
[f761f1eb]83 */
[c832cc0a]84void trap_dispatcher(__u8 n, __native stack[])
[f761f1eb]85{
[02a99d2]86 ASSERT(n < IVT_ITEMS);
87
88 ivt[n](n, stack);
[f761f1eb]89}
90
[c832cc0a]91void null_interrupt(__u8 n, __native stack[])
[f761f1eb]92{
93 printf("int %d: null_interrupt\n", n);
94 printf("stack: %L, %L, %L, %L\n", stack[0], stack[1], stack[2], stack[3]);
95 panic("unserviced interrupt\n");
96}
97
[c832cc0a]98void gp_fault(__u8 n, __native stack[])
[f761f1eb]99{
[ab08b42]100 PRINT_INFO_ERRCODE(stack);
[f4a61ef]101 panic("general protection fault\n");
[f761f1eb]102}
103
[c832cc0a]104void ss_fault(__u8 n, __native stack[])
[6de2480e]105{
[ab08b42]106 PRINT_INFO_ERRCODE(stack);
[747a2476]107 panic("stack fault\n");
[6de2480e]108}
109
110
[c832cc0a]111void nm_fault(__u8 n, __native stack[])
[6a27d63]112{
[5f85c91]113#ifdef CONFIG_FPU_LAZY
[b49f4ae]114 scheduler_fpu_lazy_request();
115#else
116 panic("fpu fault");
117#endif
[6a27d63]118}
119
120
121
[c832cc0a]122void page_fault(__u8 n, __native stack[])
[f761f1eb]123{
[ab08b42]124 PRINT_INFO_ERRCODE(stack);
[18e0a6c]125 printf("page fault address: %X\n", read_cr2());
[87cd61f]126 panic("page fault\n");
[f761f1eb]127}
128
[c832cc0a]129void syscall(__u8 n, __native stack[])
[f761f1eb]130{
[cb4b61d]131 printf("cpu%d: syscall\n", CPU->id);
[434f700]132 thread_usleep(1000);
[f761f1eb]133}
134
[c832cc0a]135void tlb_shootdown_ipi(__u8 n, __native stack[])
[169587a]136{
137 trap_virtual_eoi();
[b109ebb]138 tlb_shootdown_ipi_recv();
[169587a]139}
140
[c832cc0a]141void wakeup_ipi(__u8 n, __native stack[])
[4ffa9e0]142{
143 trap_virtual_eoi();
144}
145
[f761f1eb]146void trap_virtual_enable_irqs(__u16 irqmask)
147{
148 if (enable_irqs_function)
149 enable_irqs_function(irqmask);
150 else
[02a99d2]151 panic("no enable_irqs_function\n");
[f761f1eb]152}
153
154void trap_virtual_disable_irqs(__u16 irqmask)
155{
156 if (disable_irqs_function)
157 disable_irqs_function(irqmask);
158 else
[02a99d2]159 panic("no disable_irqs_function\n");
[f761f1eb]160}
161
162void trap_virtual_eoi(void)
163{
164 if (eoi_function)
165 eoi_function();
166 else
[02a99d2]167 panic("no eoi_function\n");
[f761f1eb]168
169}
Note: See TracBrowser for help on using the repository browser.