source: mainline/arch/ia32/src/interrupt.c@ 567807b1

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 567807b1 was 567807b1, checked in by Jakub Jermar <jakub@…>, 19 years ago

Modify the hierarchy of page fault handlers to pass access mode that caused the fault.
Architectures are required to pass either PF_ACCESS_READ, PF_ACCESS_WRITE or PF_ACCESS_EXEC
to as_page_fault(), depending on the cause of the fault.

  • Property mode set to 100644
File size: 4.9 KB
RevLine 
[f761f1eb]1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <arch/interrupt.h>
[204674e]30#include <syscall/syscall.h>
[f761f1eb]31#include <print.h>
[02a99d2]32#include <debug.h>
[f761f1eb]33#include <panic.h>
34#include <arch/i8259.h>
35#include <func.h>
36#include <cpu.h>
37#include <arch/asm.h>
[169587a]38#include <mm/tlb.h>
[20d50a1]39#include <mm/as.h>
[cb4b61d]40#include <arch.h>
[ab08b42]41#include <symtab.h>
[1084a784]42#include <proc/thread.h>
[2382d09]43#include <proc/task.h>
44#include <synch/spinlock.h>
45#include <arch/ddi/ddi.h>
[5626277]46#include <ipc/sysipc.h>
47#include <interrupt.h>
[f761f1eb]48
49/*
50 * Interrupt and exception dispatching.
51 */
52
53void (* disable_irqs_function)(__u16 irqmask) = NULL;
54void (* enable_irqs_function)(__u16 irqmask) = NULL;
55void (* eoi_function)(void) = NULL;
56
[567807b1]57void PRINT_INFO_ERRCODE(istate_t *istate)
[97b64c9]58{
59 char *symbol = get_symtab_entry(istate->eip);
60
61 if (!symbol)
62 symbol = "";
63
64 if (CPU)
65 printf("----------------EXCEPTION OCCURED (cpu%d)----------------\n", CPU->id);
66 else
67 printf("----------------EXCEPTION OCCURED----------------\n");
68
[cf85e24c]69 printf("%%eip: %#x (%s)\n",istate->eip,symbol);
70 printf("ERROR_WORD=%#x\n", istate->error_word);
71 printf("%%cs=%#x,flags=%#x\n", istate->cs, istate->eflags);
72 printf("%%eax=%#x, %%ecx=%#x, %%edx=%#x, %%esp=%#x\n", istate->eax,istate->ecx,istate->edx,&istate->stack[0]);
[53f9821]73#ifdef CONFIG_DEBUG_ALLREGS
[cf85e24c]74 printf("%%esi=%#x, %%edi=%#x, %%ebp=%#x, %%ebx=%#x\n", istate->esi,istate->edi,istate->ebp,istate->ebx);
[53f9821]75#endif
[cf85e24c]76 printf("stack: %#x, %#x, %#x, %#x\n", istate->stack[0], istate->stack[1], istate->stack[2], istate->stack[3]);
77 printf(" %#x, %#x, %#x, %#x\n", istate->stack[4], istate->stack[5], istate->stack[6], istate->stack[7]);
[97b64c9]78}
[ab08b42]79
[25d7709]80void null_interrupt(int n, istate_t *istate)
[f761f1eb]81{
[25d7709]82 PRINT_INFO_ERRCODE(istate);
83 panic("unserviced interrupt: %d\n", n);
[f761f1eb]84}
85
[2382d09]86/** General Protection Fault. */
[25d7709]87void gp_fault(int n, istate_t *istate)
[f761f1eb]88{
[2382d09]89 if (TASK) {
90 count_t ver;
91
92 spinlock_lock(&TASK->lock);
93 ver = TASK->arch.iomapver;
94 spinlock_unlock(&TASK->lock);
95
96 if (CPU->arch.iomapver_copy != ver) {
97 /*
98 * This fault can be caused by an early access
99 * to I/O port because of an out-dated
100 * I/O Permission bitmap installed on CPU.
101 * Install the fresh copy and restart
102 * the instruction.
103 */
104 io_perm_bitmap_install();
105 return;
106 }
107 }
108
[25d7709]109 PRINT_INFO_ERRCODE(istate);
[f4a61ef]110 panic("general protection fault\n");
[f761f1eb]111}
112
[25d7709]113void ss_fault(int n, istate_t *istate)
[6de2480e]114{
[25d7709]115 PRINT_INFO_ERRCODE(istate);
[747a2476]116 panic("stack fault\n");
[6de2480e]117}
118
[3b05862f]119void simd_fp_exception(int n, istate_t *istate)
120{
121
122 PRINT_INFO_ERRCODE(istate);
123 __u32 mxcsr;
124 asm
125 (
126 "stmxcsr %0;\n"
127 :"=m"(mxcsr)
128 );
[280a27e]129 printf("MXCSR: %#zX\n",(__native)(mxcsr));
[3b05862f]130 panic("SIMD FP exception(19)\n");
131}
132
[25d7709]133void nm_fault(int n, istate_t *istate)
[6a27d63]134{
[5f85c91]135#ifdef CONFIG_FPU_LAZY
[b49f4ae]136 scheduler_fpu_lazy_request();
137#else
138 panic("fpu fault");
139#endif
[6a27d63]140}
141
[25d7709]142void syscall(int n, istate_t *istate)
[f761f1eb]143{
[53f9821]144 panic("Obsolete syscall handler.");
[f761f1eb]145}
146
[25d7709]147void tlb_shootdown_ipi(int n, istate_t *istate)
[169587a]148{
149 trap_virtual_eoi();
[b109ebb]150 tlb_shootdown_ipi_recv();
[169587a]151}
152
[f761f1eb]153void trap_virtual_enable_irqs(__u16 irqmask)
154{
155 if (enable_irqs_function)
156 enable_irqs_function(irqmask);
157 else
[02a99d2]158 panic("no enable_irqs_function\n");
[f761f1eb]159}
160
161void trap_virtual_disable_irqs(__u16 irqmask)
162{
163 if (disable_irqs_function)
164 disable_irqs_function(irqmask);
165 else
[02a99d2]166 panic("no disable_irqs_function\n");
[f761f1eb]167}
168
169void trap_virtual_eoi(void)
170{
171 if (eoi_function)
172 eoi_function();
173 else
[02a99d2]174 panic("no eoi_function\n");
[f761f1eb]175
176}
[5626277]177
178static void ipc_int(int n, istate_t *istate)
179{
180 trap_virtual_eoi();
181 ipc_irq_send_notif(n-IVT_IRQBASE);
182}
183
184
185/* Reregister irq to be IPC-ready */
186void irq_ipc_bind_arch(__native irq)
187{
188 if (irq == IRQ_CLK)
189 return;
190 exc_register(IVT_IRQBASE+irq, "ipc_int", ipc_int);
191}
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