source: mainline/arch/ia32/src/ia32.c@ 25d7709

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 25d7709 was 25d7709, checked in by Jakub Jermar <jakub@…>, 19 years ago

Nicer ia32 interrupt handlers and structures holding interrupted context data.
Unify the name holding interrupted context data on all architectures to be istate.

  • Property mode set to 100644
File size: 2.8 KB
RevLine 
[f761f1eb]1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <arch.h>
30
31#include <arch/types.h>
32#include <typedefs.h>
33
34#include <arch/pm.h>
35
36#include <arch/ega.h>
[02f441c0]37#include <genarch/i8042/i8042.h>
[f761f1eb]38#include <arch/i8254.h>
39#include <arch/i8259.h>
40
41#include <arch/context.h>
42
43#include <config.h>
44
45#include <arch/interrupt.h>
[ad36bd6]46#include <arch/asm.h>
[e16e036a]47#include <genarch/acpi/acpi.h>
[9c0a9b3]48
49#include <arch/bios/bios.h>
50
[1e9a463]51#include <arch/mm/memory_init.h>
[fcfac420]52#include <interrupt.h>
[ad36bd6]53
[f07bba5]54void arch_pre_mm_init(void)
[f761f1eb]55{
56 pm_init();
57
58 if (config.cpu_active == 1) {
[dba84ff]59 bios_init();
[76cec1e]60 i8259_init(); /* PIC */
[f761f1eb]61 i8254_init(); /* hard clock */
[5dce48b9]62
[25d7709]63 exc_register(VECTOR_SYSCALL, "syscall", (iroutine) syscall);
[169587a]64
[5f85c91]65 #ifdef CONFIG_SMP
[fcfac420]66 exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown",
[25d7709]67 (iroutine) tlb_shootdown_ipi);
[5f85c91]68 #endif /* CONFIG_SMP */
[f761f1eb]69 }
70}
71
[6ba143d]72void arch_post_mm_init(void)
[7eade45]73{
[425913b]74 if (config.cpu_active == 1) {
75 ega_init(); /* video */
[babcb148]76 }
77}
78
[7453929]79void arch_pre_smp_init(void)
[babcb148]80{
81 if (config.cpu_active == 1) {
[1e9a463]82 memory_print_map();
83
[5f85c91]84 #ifdef CONFIG_SMP
[85bfdcc8]85 acpi_init();
[5f85c91]86 #endif /* CONFIG_SMP */
[425913b]87 }
[7eade45]88}
89
[7453929]90void arch_post_smp_init(void)
91{
[a83a802]92 i8042_init(); /* keyboard controller */
[7453929]93}
94
[f761f1eb]95void calibrate_delay_loop(void)
96{
97 i8254_calibrate_delay_loop();
[f701b236]98 if (config.cpu_active == 1) {
99 /*
100 * This has to be done only on UP.
101 * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
102 */
103 i8254_normal_operation();
104 }
[f761f1eb]105}
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