source: mainline/arch/ia32/src/ddi/ddi.c@ 1bb2e7a

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 1bb2e7a was 1bb2e7a, checked in by Jakub Jermar <jakub@…>, 19 years ago

Updates in Doxygen-style comments.
Make architecture specific modules appear conditionally in the documentation.
Add time management module.
Improve names of other modules and sort module order
to be more like in the design documentation.

  • Property mode set to 100644
File size: 4.5 KB
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1/*
2 * Copyright (C) 2006 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia32ddi
30 * @{
31 */
32/** @file
33 */
34
35#include <ddi/ddi.h>
36#include <arch/ddi/ddi.h>
37#include <proc/task.h>
38#include <arch/types.h>
39#include <typedefs.h>
40#include <adt/bitmap.h>
41#include <mm/slab.h>
42#include <arch/pm.h>
43#include <errno.h>
44#include <arch/cpu.h>
45#include <cpu.h>
46#include <arch.h>
47#include <align.h>
48
49/** Enable I/O space range for task.
50 *
51 * Interrupts are disabled and task is locked.
52 *
53 * @param task Task.
54 * @param ioaddr Startign I/O space address.
55 * @param size Size of the enabled I/O range.
56 *
57 * @return 0 on success or an error code from errno.h.
58 */
59int ddi_iospace_enable_arch(task_t *task, __address ioaddr, size_t size)
60{
61 count_t bits;
62
63 bits = ioaddr + size;
64 if (bits > IO_PORTS)
65 return ENOENT;
66
67 if (task->arch.iomap.bits < bits) {
68 bitmap_t oldiomap;
69 __u8 *newmap;
70
71 /*
72 * The I/O permission bitmap is too small and needs to be grown.
73 */
74
75 newmap = (__u8 *) malloc(BITS2BYTES(bits), FRAME_ATOMIC);
76 if (!newmap)
77 return ENOMEM;
78
79 bitmap_initialize(&oldiomap, task->arch.iomap.map, task->arch.iomap.bits);
80 bitmap_initialize(&task->arch.iomap, newmap, bits);
81
82 /*
83 * Mark the new range inaccessible.
84 */
85 bitmap_set_range(&task->arch.iomap, oldiomap.bits, bits - oldiomap.bits);
86
87 /*
88 * In case there really existed smaller iomap,
89 * copy its contents and deallocate it.
90 */
91 if (oldiomap.bits) {
92 bitmap_copy(&task->arch.iomap, &oldiomap, oldiomap.bits);
93 free(oldiomap.map);
94 }
95 }
96
97 /*
98 * Enable the range and we are done.
99 */
100 bitmap_clear_range(&task->arch.iomap, (index_t) ioaddr, (count_t) size);
101
102 /*
103 * Increment I/O Permission bitmap generation counter.
104 */
105 task->arch.iomapver++;
106
107 return 0;
108}
109
110/** Install I/O Permission bitmap.
111 *
112 * Current task's I/O permission bitmap, if any, is installed
113 * in the current CPU's TSS.
114 *
115 * Interrupts must be disabled prior this call.
116 */
117void io_perm_bitmap_install(void)
118{
119 count_t bits;
120 ptr_16_32_t cpugdtr;
121 descriptor_t *gdt_p;
122 count_t ver;
123
124 /* First, copy the I/O Permission Bitmap. */
125 spinlock_lock(&TASK->lock);
126 ver = TASK->arch.iomapver;
127 if ((bits = TASK->arch.iomap.bits)) {
128 bitmap_t iomap;
129
130 ASSERT(TASK->arch.iomap.map);
131 bitmap_initialize(&iomap, CPU->arch.tss->iomap, TSS_IOMAP_SIZE * 8);
132 bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits);
133 /*
134 * It is safe to set the trailing eight bits because of the extra
135 * convenience byte in TSS_IOMAP_SIZE.
136 */
137 bitmap_set_range(&iomap, ALIGN_UP(TASK->arch.iomap.bits, 8), 8);
138 }
139 spinlock_unlock(&TASK->lock);
140
141 /*
142 * Second, adjust TSS segment limit.
143 * Take the extra ending byte with all bits set into account.
144 */
145 gdtr_store(&cpugdtr);
146 gdt_p = (descriptor_t *) cpugdtr.base;
147 gdt_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits));
148 gdtr_load(&cpugdtr);
149
150 /*
151 * Before we load new TSS limit, the current TSS descriptor
152 * type must be changed to describe inactive TSS.
153 */
154 gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
155 tr_load(selector(TSS_DES));
156
157 /*
158 * Update the generation count so that faults caused by
159 * early accesses can be serviced.
160 */
161 CPU->arch.iomapver_copy = ver;
162}
163
164/** @}
165 */
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