source: mainline/arch/ia32/src/asm.S@ 74b2f5bf

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 74b2f5bf was 104dc0b, checked in by Sergey Bondari <bondari@…>, 20 years ago

built-in memcpy is not used anymore on IA-32.
IA-32 memcpy is now fast and inline.

  • Property mode set to 100644
File size: 4.5 KB
Line 
1#
2# Copyright (C) 2001-2004 Jakub Jermar
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29## very low and hardware-level functions
30
31# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
32# and 1 means interrupt with error word
33#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
34
35.text
36
37.global paging_on
38.global enable_l_apic_in_msr
39.global interrupt_handlers
40.global memsetb
41.global memsetw
42.global memcmp
43
44
45## Turn paging on
46#
47# Enable paging and write-back caching in CR0.
48#
49paging_on:
50 movl %cr0,%edx
51 orl $(1<<31),%edx # paging on
52 andl $~((1<<30)|(1<<29)),%edx # clear Cache Disable and not Write Though
53 movl %edx,%cr0
54 jmp 0f
550:
56 ret
57
58
59## Enable local APIC
60#
61# Enable local APIC in MSR.
62#
63enable_l_apic_in_msr:
64 push %eax
65
66 movl $0x1b, %ecx
67 rdmsr
68 orl $(1<<11),%eax
69 orl $(0xfee00000),%eax
70 wrmsr
71
72 pop %eax
73 ret
74
75
76## Declare interrupt handlers
77#
78# Declare interrupt handlers for n interrupt
79# vectors starting at vector i.
80#
81# The handlers setup data segment registers
82# and call trap_dispatcher().
83#
84.macro handler i n
85 push %ebp
86 movl %esp,%ebp
87 pusha
88
89 push %ds
90 push %es
91
92 # we must fill the data segment registers
93 movw $16,%ax
94 movw %ax,%ds
95 movw %ax,%es
96
97 movl $(\i),%edi
98 pushl %ebp
99 addl $4,(%esp)
100 pushl %edi
101 call trap_dispatcher
102 addl $8,%esp
103
104 pop %es
105 pop %ds
106
107
108# CLNT
109 pushfl
110 pop %eax
111 and $0xFFFFBFFF,%eax
112 push %eax
113 popfl
114
115
116
117# Test if this is interrupt with error word or not
118 mov $\i,%cl
119 movl $1,%eax
120 test $0xe0,%cl
121 jnz 0f
122 and $0x1f,%cl
123 shl %cl,%eax
124 and $ERROR_WORD_INTERRUPT_LIST,%eax
125 jz 0f
126
127
128# Return with error word
129 popa
130 pop %ebp
131 add $4,%esp # Skip error word
132 iret
133
1340:
135# Return with no error word
136 popa
137 pop %ebp
138 iret
139
140 .if (\n-\i)-1
141 handler "(\i+1)",\n
142 .endif
143.endm
144
145# keep in sync with pm.h !!!
146IDT_ITEMS=64
147interrupt_handlers:
148h_start:
149 handler 0 64
150# handler 64 128
151# handler 128 192
152# handler 192 256
153h_end:
154
155
156## Fill memory with bytes
157#
158# Fill a given number of bytes (2nd argument)
159# at memory defined by 1st argument with the
160# byte value defined by 3rd argument.
161#
162DST=12
163CNT=16
164X=20
165memsetb:
166 push %eax
167 push %edi
168
169 movl CNT(%esp),%ecx
170 movl DST(%esp),%edi
171 movl X(%esp),%eax
172
173 rep stosb %al,%es:(%edi)
174
175 pop %edi
176 pop %eax
177 ret
178
179
180## Fill memory with words
181#
182# Fill a given number of words (2nd argument)
183# at memory defined by 1st argument with the
184# word value defined by 3rd argument.
185#
186DST=12
187CNT=16
188X=20
189memsetw:
190 push %eax
191 push %edi
192
193 movl CNT(%esp),%ecx
194 movl DST(%esp),%edi
195 movl X(%esp),%eax
196
197 rep stosw %ax,%es:(%edi)
198
199 pop %edi
200 pop %eax
201
202 ret
203
204
205## Compare memory regions for equality
206#
207# Compare a given number of bytes (3rd argument)
208# at memory locations defined by 1st and 2nd argument
209# for equality. If the bytes are equal, EAX contains
210# 0.
211#
212SRC=12
213DST=16
214CNT=20
215memcmp:
216 push %esi
217 push %edi
218
219 movl CNT(%esp),%ecx
220 movl DST(%esp),%edi
221 movl SRC(%esp),%esi
222
223 repe cmpsb %es:(%edi),%ds:(%esi)
224 movl %ecx,%eax # %ecx contains the return value (zero on success)
225
226 pop %edi
227 pop %esi
228
229 ret
230
231
232# THIS IS USERSPACE CODE
233.global utext
234utext:
235 xor %ax,%ax
236 mov %ax,%ds
237 mov %ax,%es
238 mov %ax,%fs
239 mov %ax,%gs
2400:
241 int $48
242 jmp 0b
243 # not reached
244utext_end:
245
246.data
247.global utext_size
248utext_size:
249 .long utext_end - utext
250
251.global interrupt_handler_size
252
253interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS
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