source: mainline/arch/ia32/src/acpi/madt.c@ 5dce48b9

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 5dce48b9 was 9c0a9b3, checked in by Jakub Vana <jakub.vana@…>, 20 years ago

1) memcopy and _memcopy functions rewriten to ANSI C norm.
2) Repaired ia32,ia64 and mips version of SPARTAN to work with this memcopy functions
3) Warning for non declared funcions added and repaired ia32,ia64 and mips versions to pass build process with this warning and Werror option

  • Property mode set to 100644
File size: 5.4 KB
Line 
1/*
2 * Copyright (C) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <arch/types.h>
30#include <typedefs.h>
31#include <arch/acpi/acpi.h>
32#include <arch/acpi/madt.h>
33#include <arch/smp/apic.h>
34#include <arch/smp/smp.h>
35#include <panic.h>
36#include <debug.h>
37#include <config.h>
38#include <print.h>
39
40struct acpi_madt *acpi_madt = NULL;
41
42#ifdef __SMP__
43
44/*
45 * NOTE: it is currently not completely clear to the authors of SPARTAN whether
46 * MADT can exist in such a form that entries of the same type are not consecutive.
47 * Because of this uncertainity, some entry types are explicitly checked for
48 * being consecutive with other entries of the same kind.
49 */
50
51static void madt_l_apic_entry(struct madt_l_apic *la, __u8 prev_type);
52static void madt_io_apic_entry(struct madt_io_apic *ioa, __u8 prev_type);
53
54struct madt_l_apic *madt_l_apic_entries = NULL;
55struct madt_io_apic *madt_io_apic_entries = NULL;
56
57int madt_l_apic_entry_cnt = 0;
58int madt_io_apic_entry_cnt = 0;
59
60char *entry[] = {
61 "L_APIC",
62 "IO_APIC",
63 "INTR_SRC_OVRD",
64 "NMI_SRC",
65 "L_APIC_NMI",
66 "L_APIC_ADDR_OVRD",
67 "IO_SAPIC",
68 "L_SAPIC",
69 "PLATFORM_INTR_SRC"
70};
71
72/*
73 * ACPI MADT Implementation of SMP configuration interface.
74 */
75static count_t madt_cpu_count(void);
76static bool madt_cpu_enabled(index_t i);
77static bool madt_cpu_bootstrap(index_t i);
78static __u8 madt_cpu_apic_id(index_t i);
79
80struct smp_config_operations madt_config_operations = {
81 .cpu_count = madt_cpu_count,
82 .cpu_enabled = madt_cpu_enabled,
83 .cpu_bootstrap = madt_cpu_bootstrap,
84 .cpu_apic_id = madt_cpu_apic_id
85};
86
87static count_t madt_cpu_count(void)
88{
89 return madt_l_apic_entry_cnt;
90}
91
92static bool madt_cpu_enabled(index_t i)
93{
94 ASSERT(i < madt_l_apic_entry_cnt);
95 return madt_l_apic_entries[i].flags & 0x1;
96}
97
98static bool madt_cpu_bootstrap(index_t i)
99{
100 ASSERT(i < madt_l_apic_entry_cnt);
101 return madt_l_apic_entries[i].apic_id == l_apic_id();
102}
103
104static __u8 madt_cpu_apic_id(index_t i)
105{
106 ASSERT(i < madt_l_apic_entry_cnt);
107 return madt_l_apic_entries[i].apic_id;
108}
109
110void acpi_madt_parse(void)
111{
112 struct madt_apic_header *end = (struct madt_apic_header *) (((__u8 *) acpi_madt) + acpi_madt->header.length);
113 struct madt_apic_header *h = &acpi_madt->apic_header[0];
114 __u8 prev_type = 0; /* used to detect inconsecutive entries */
115
116
117 l_apic = (__u32 *) acpi_madt->l_apic_address;
118
119 while (h < end) {
120 switch (h->type) {
121 case MADT_L_APIC:
122 madt_l_apic_entry((struct madt_l_apic *) h, prev_type);
123 break;
124 case MADT_IO_APIC:
125 madt_io_apic_entry((struct madt_io_apic *) h, prev_type);
126 break;
127 case MADT_INTR_SRC_OVRD:
128 case MADT_NMI_SRC:
129 case MADT_L_APIC_NMI:
130 case MADT_L_APIC_ADDR_OVRD:
131 case MADT_IO_SAPIC:
132 case MADT_L_SAPIC:
133 case MADT_PLATFORM_INTR_SRC:
134 printf("MADT: skipping %s entry (type=%d)\n", entry[h->type], h->type);
135 break;
136
137 default:
138 if (h->type >= MADT_RESERVED_SKIP_BEGIN && h->type <= MADT_RESERVED_SKIP_END) {
139 printf("MADT: skipping reserved entry (type=%d)\n", h->type);
140 }
141 if (h->type >= MADT_RESERVED_OEM_BEGIN) {
142 printf("MADT: skipping OEM entry (type=%d)\n", h->type);
143 }
144 break;
145 }
146 prev_type = h->type;
147 h = (struct madt_apic_header *) (((__u8 *) h) + h->length);
148 }
149
150 if (madt_l_apic_entry_cnt)
151 config.cpu_count = madt_l_apic_entry_cnt;
152}
153
154void madt_l_apic_entry(struct madt_l_apic *la, __u8 prev_type)
155{
156 /* check for consecutiveness */
157 if (madt_l_apic_entry_cnt && prev_type != MADT_L_APIC)
158 panic("%s entries are not consecuitve\n", entry[MADT_L_APIC]);
159
160 if (!madt_l_apic_entry_cnt++)
161 madt_l_apic_entries = la;
162
163 if (!(la->flags & 0x1)) {
164 /* Processor is unusable, skip it. */
165 return;
166 }
167
168 apic_id_mask |= 1<<la->apic_id;
169}
170
171void madt_io_apic_entry(struct madt_io_apic *ioa, __u8 prev_type)
172{
173 /* check for consecutiveness */
174 if (madt_io_apic_entry_cnt && prev_type != MADT_IO_APIC)
175 panic("%s entries are not consecuitve\n", entry[MADT_IO_APIC]);
176
177 if (!madt_io_apic_entry_cnt++) {
178 madt_io_apic_entries = ioa;
179 io_apic = (__u32 *) ioa->io_apic_address;
180 }
181 else {
182 /* currently not supported */
183 return;
184 }
185}
186
187
188#endif /* __SMP__ */
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