source: mainline/arch/ia32/include/cpuid.h@ e3e29b75

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since e3e29b75 was 1bb2e7a, checked in by Jakub Jermar <jakub@…>, 19 years ago

Updates in Doxygen-style comments.
Make architecture specific modules appear conditionally in the documentation.
Add time management module.
Improve names of other modules and sort module order
to be more like in the design documentation.

  • Property mode set to 100644
File size: 3.1 KB
Line 
1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia32
30 * @{
31 */
32/** @file
33 */
34
35#ifndef __ia32_CPUID_H__
36#define __ia32_CPUID_H__
37
38#include <arch/types.h>
39
40struct cpu_info {
41 __u32 cpuid_eax;
42 __u32 cpuid_ebx;
43 __u32 cpuid_ecx;
44 __u32 cpuid_edx;
45} __attribute__ ((packed));
46
47struct __cpuid_extended_feature_info {
48 unsigned sse3 : 1;
49 unsigned : 31;
50} __attribute__ ((packed));
51
52typedef union cpuid_extended_feature_info
53{
54 struct __cpuid_extended_feature_info bits;
55 __u32 word;
56}cpuid_extended_feature_info;
57
58
59struct __cpuid_feature_info {
60 unsigned : 23;
61 unsigned mmx : 1;
62 unsigned fxsr : 1;
63 unsigned sse : 1;
64 unsigned sse2 : 1;
65 unsigned : 5;
66} __attribute__ ((packed));
67
68typedef union cpuid_feature_info
69{
70 struct __cpuid_feature_info bits;
71 __u32 word ;
72}cpuid_feature_info;
73
74
75static inline __u32 has_cpuid(void)
76{
77 __u32 val, ret;
78
79 __asm__ volatile (
80 "pushf\n" /* read flags */
81 "popl %0\n"
82 "movl %0, %1\n"
83
84 "btcl $21, %1\n" /* swap the ID bit */
85
86 "pushl %1\n" /* propagate the change into flags */
87 "popf\n"
88 "pushf\n"
89 "popl %1\n"
90
91 "andl $(1 << 21), %0\n" /* interrested only in ID bit */
92 "andl $(1 << 21), %1\n"
93 "xorl %1, %0\n"
94 : "=r" (ret), "=r" (val)
95 );
96
97 return ret;
98}
99
100static inline void cpuid(__u32 cmd, struct cpu_info *info)
101{
102 __asm__ volatile (
103 "movl %4, %%eax\n"
104 "cpuid\n"
105
106 "movl %%eax, %0\n"
107 "movl %%ebx, %1\n"
108 "movl %%ecx, %2\n"
109 "movl %%edx, %3\n"
110 : "=m" (info->cpuid_eax), "=m" (info->cpuid_ebx), "=m" (info->cpuid_ecx), "=m" (info->cpuid_edx)
111 : "m" (cmd)
112 : "eax", "ebx", "ecx", "edx"
113 );
114}
115
116#endif
117
118/** @}
119 */
120
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