source: mainline/arch/ia32/include/atomic.h@ 0172eba

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 0172eba was 59e07c91, checked in by Jakub Jermar <jakub@…>, 20 years ago

Define atomic_t type.

  • Property mode set to 100644
File size: 2.1 KB
RevLine 
[f761f1eb]1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[397c77f]29#ifndef __ia32_ATOMIC_H__
30#define __ia32_ATOMIC_H__
[f761f1eb]31
32#include <arch/types.h>
33
[59e07c91]34typedef volatile __u32 atomic_t;
35
36static inline void atomic_inc(atomic_t *val) {
[5f85c91]37#ifdef CONFIG_SMP
[345ce2f]38 __asm__ volatile ("lock incl %0\n" : "=m" (*val));
[18e0a6c]39#else
[345ce2f]40 __asm__ volatile ("incl %0\n" : "=m" (*val));
[5f85c91]41#endif /* CONFIG_SMP */
[18e0a6c]42}
43
[59e07c91]44static inline void atomic_dec(atomic_t *val) {
[5f85c91]45#ifdef CONFIG_SMP
[345ce2f]46 __asm__ volatile ("lock decl %0\n" : "=m" (*val));
[18e0a6c]47#else
[345ce2f]48 __asm__ volatile ("decl %0\n" : "=m" (*val));
[5f85c91]49#endif /* CONFIG_SMP */
[18e0a6c]50}
51
[74df77d]52static inline int test_and_set(volatile int *val) {
[18e0a6c]53 int v;
54
55 __asm__ volatile (
56 "movl $1, %0\n"
[345ce2f]57 "xchgl %0, %1\n"
58 : "=r" (v),"=m" (*val)
[18e0a6c]59 );
60
61 return v;
62}
63
[f761f1eb]64
[74df77d]65extern void spinlock_arch(volatile int *val);
[f761f1eb]66
67#endif
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