[f761f1eb] | 1 | /*
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| 2 | * Copyright (C) 2001-2004 Jakub Jermar
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[397c77f] | 29 | #ifndef __ia32_ATOMIC_H__
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| 30 | #define __ia32_ATOMIC_H__
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[f761f1eb] | 31 |
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| 32 | #include <arch/types.h>
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| 33 |
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[59e07c91] | 34 | typedef volatile __u32 atomic_t;
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| 35 |
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| 36 | static inline void atomic_inc(atomic_t *val) {
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[5f85c91] | 37 | #ifdef CONFIG_SMP
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[345ce2f] | 38 | __asm__ volatile ("lock incl %0\n" : "=m" (*val));
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[18e0a6c] | 39 | #else
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[345ce2f] | 40 | __asm__ volatile ("incl %0\n" : "=m" (*val));
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[5f85c91] | 41 | #endif /* CONFIG_SMP */
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[18e0a6c] | 42 | }
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| 43 |
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[59e07c91] | 44 | static inline void atomic_dec(atomic_t *val) {
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[5f85c91] | 45 | #ifdef CONFIG_SMP
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[345ce2f] | 46 | __asm__ volatile ("lock decl %0\n" : "=m" (*val));
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[18e0a6c] | 47 | #else
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[345ce2f] | 48 | __asm__ volatile ("decl %0\n" : "=m" (*val));
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[5f85c91] | 49 | #endif /* CONFIG_SMP */
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[18e0a6c] | 50 | }
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| 51 |
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[74df77d] | 52 | static inline int test_and_set(volatile int *val) {
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[18e0a6c] | 53 | int v;
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| 54 |
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| 55 | __asm__ volatile (
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| 56 | "movl $1, %0\n"
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[345ce2f] | 57 | "xchgl %0, %1\n"
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| 58 | : "=r" (v),"=m" (*val)
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[18e0a6c] | 59 | );
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| 60 |
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| 61 | return v;
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| 62 | }
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| 63 |
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[f761f1eb] | 64 |
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[74df77d] | 65 | extern void spinlock_arch(volatile int *val);
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[f761f1eb] | 66 |
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| 67 | #endif
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