source: mainline/arch/ia32/include/asm.h@ 18e0a6c

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 18e0a6c was 18e0a6c, checked in by Jakub Jermar <jakub@…>, 20 years ago

Implement several assembler functions in gcc's asm notation instead of in .s or .S file.
Gain both better speed and size.

  • Property mode set to 100644
File size: 3.8 KB
Line 
1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __ia32_ASM_H__
30#define __ia32_ASM_H__
31
32#include <arch/types.h>
33#include <typedefs.h>
34#include <mm/page.h>
35#include <synch/spinlock.h>
36
37extern __u32 interrupt_handler_size;
38
39extern void paging_on(void);
40
41extern void interrupt_handlers(void);
42
43extern __u8 inb(int port);
44extern __u16 inw(int port);
45extern __u32 inl(int port);
46
47extern void outb(int port, __u8 b);
48extern void outw(int port, __u16 w);
49extern void outl(int port, __u32 l);
50
51extern void enable_l_apic_in_msr(void);
52
53/** Halt CPU
54 *
55 * Halt the current CPU until interrupt event.
56 */
57static inline void cpu_halt(void) { __asm__("hlt"); };
58static inline void cpu_sleep(void) { __asm__("hlt"); };
59
60/** Read CR2
61 *
62 * Return value in CR2
63 *
64 * @return Value read.
65 */
66static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0" : "=r" (v)); return v; }
67
68/** Write CR3
69 *
70 * Write value to CR3.
71 *
72 * @param v Value to be written.
73 */
74static inline void write_cr3(__u32 v) { __asm__ volatile ("movl %0,%%cr3\n" : : "r" (v)); }
75
76/** Read CR3
77 *
78 * Return value in CR3
79 *
80 * @return Value read.
81 */
82static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0" : "=r" (v)); return v; }
83
84/** Write DR0
85 *
86 * Write value to DR0.
87 *
88 * @param v Value to be written.
89 */
90static inline void write_dr0(__u32 v) { __asm__ volatile ("movl %0,%%dr0\n" : : "r" (v)); }
91
92/** Read DR0
93 *
94 * Return value in DR0
95 *
96 * @return Value read.
97 */
98static inline __u32 read_dr0(void) { __u32 v; __asm__ volatile ("movl %%dr0,%0" : "=r" (v)); return v; }
99
100/** Set priority level low
101 *
102 * Enable interrupts and return previous
103 * value of EFLAGS.
104 */
105static inline pri_t cpu_priority_low(void) {
106 pri_t v;
107 __asm__ volatile (
108 "pushf\n"
109 "popl %0\n"
110 "sti\n"
111 : "=r" (v)
112 );
113 return v;
114}
115
116/** Set priority level high
117 *
118 * Disable interrupts and return previous
119 * value of EFLAGS.
120 */
121static inline pri_t cpu_priority_high(void) {
122 pri_t v;
123 __asm__ volatile (
124 "pushf\n"
125 "popl %0\n"
126 "cli\n"
127 : "=r" (v)
128 );
129 return v;
130}
131
132/** Restore priority level
133 *
134 * Restore EFLAGS.
135 */
136static inline void cpu_priority_restore(pri_t pri) {
137 __asm__ volatile (
138 "pushl %0\n"
139 "popf\n"
140 : : "r" (pri)
141 );
142}
143
144/** Return raw priority level
145 *
146 * Return EFLAFS.
147 */
148static inline pri_t cpu_priority_read(void) {
149 pri_t v;
150 __asm__ volatile (
151 "pushf\n"
152 "popl %0\n"
153 : "=r" (v)
154 );
155 return v;
156}
157
158#endif
Note: See TracBrowser for help on using the repository browser.