source: mainline/arch/ia32/include/asm.h@ a5556b4

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since a5556b4 was a5556b4, checked in by Sergey Bondari <bondari@…>, 20 years ago

outb inline function

  • Property mode set to 100644
File size: 4.1 KB
Line 
1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __ia32_ASM_H__
30#define __ia32_ASM_H__
31
32#include <arch/types.h>
33#include <config.h>
34
35extern __u32 interrupt_handler_size;
36
37extern void paging_on(void);
38
39extern void interrupt_handlers(void);
40
41extern __u8 inb(int port);
42extern __u16 inw(int port);
43extern __u32 inl(int port);
44
45extern void outw(int port, __u16 w);
46extern void outl(int port, __u32 l);
47
48extern void enable_l_apic_in_msr(void);
49
50
51void asm_delay_loop(__u32 t);
52void asm_fake_loop(__u32 t);
53
54
55/** Halt CPU
56 *
57 * Halt the current CPU until interrupt event.
58 */
59static inline void cpu_halt(void) { __asm__("hlt\n"); };
60static inline void cpu_sleep(void) { __asm__("hlt\n"); };
61
62/** Read CR2
63 *
64 * Return value in CR2
65 *
66 * @return Value read.
67 */
68static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0\n" : "=r" (v)); return v; }
69
70/** Write CR3
71 *
72 * Write value to CR3.
73 *
74 * @param v Value to be written.
75 */
76static inline void write_cr3(__u32 v) { __asm__ volatile ("movl %0,%%cr3\n" : : "r" (v)); }
77
78/** Read CR3
79 *
80 * Return value in CR3
81 *
82 * @return Value read.
83 */
84static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0\n" : "=r" (v)); return v; }
85
86/** Byte to port
87 *
88 * Output byte to port
89 *
90 * @param port Port to write to
91 * @param val Value to write
92 */
93static inline void outb(__u16 port, __u8 val) { __asm__ volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) ); }
94
95
96/** Set priority level low
97 *
98 * Enable interrupts and return previous
99 * value of EFLAGS.
100 */
101static inline pri_t cpu_priority_low(void) {
102 pri_t v;
103 __asm__ volatile (
104 "pushf\n"
105 "popl %0\n"
106 "sti\n"
107 : "=r" (v)
108 );
109 return v;
110}
111
112/** Set priority level high
113 *
114 * Disable interrupts and return previous
115 * value of EFLAGS.
116 */
117static inline pri_t cpu_priority_high(void) {
118 pri_t v;
119 __asm__ volatile (
120 "pushf\n"
121 "popl %0\n"
122 "cli\n"
123 : "=r" (v)
124 );
125 return v;
126}
127
128/** Restore priority level
129 *
130 * Restore EFLAGS.
131 */
132static inline void cpu_priority_restore(pri_t pri) {
133 __asm__ volatile (
134 "pushl %0\n"
135 "popf\n"
136 : : "r" (pri)
137 );
138}
139
140/** Return raw priority level
141 *
142 * Return EFLAFS.
143 */
144static inline pri_t cpu_priority_read(void) {
145 pri_t v;
146 __asm__ volatile (
147 "pushf\n"
148 "popl %0\n"
149 : "=r" (v)
150 );
151 return v;
152}
153
154/** Return base address of current stack
155 *
156 * Return the base address of the current stack.
157 * The stack is assumed to be STACK_SIZE bytes long.
158 * The stack must start on page boundary.
159 */
160static inline __address get_stack_base(void)
161{
162 __address v;
163
164 __asm__ volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1)));
165
166 return v;
167}
168
169static inline __u64 rdtsc(void)
170{
171 __u64 v;
172
173 __asm__ volatile("rdtsc\n" : "=A" (v));
174
175 return v;
176}
177
178
179#endif
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