source: mainline/arch/ia32/include/asm.h@ 1e9a463

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 1e9a463 was 1fbbcd6, checked in by Jakub Jermar <jakub@…>, 20 years ago

Globalize 'size' and 'delta' and rename them to 'kernel_size' and 'heap_delta'.

Fix heap initialization to take 'heap_delta' into account.

Implement IA-64 get_stack_base().

Adjust SP_DELTA's to consider one extra word on stack.
(So that the stack pointer is within appropriate limits even on IA-64).

More #include cleanup.

  • Property mode set to 100644
File size: 4.1 KB
RevLine 
[f761f1eb]1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[397c77f]29#ifndef __ia32_ASM_H__
30#define __ia32_ASM_H__
[f761f1eb]31
32#include <arch/types.h>
33#include <typedefs.h>
[b52da8d7]34#include <config.h>
[f761f1eb]35#include <synch/spinlock.h>
[5d721f0]36#include <arch/boot/memmap.h>
[361635c]37#include <config.h>
[f761f1eb]38
39extern __u32 interrupt_handler_size;
40
41extern void paging_on(void);
42
43extern void interrupt_handlers(void);
44
45extern __u8 inb(int port);
46extern __u16 inw(int port);
47extern __u32 inl(int port);
48
49extern void outb(int port, __u8 b);
50extern void outw(int port, __u16 w);
51extern void outl(int port, __u32 l);
52
53extern void enable_l_apic_in_msr(void);
54
[18e0a6c]55/** Halt CPU
56 *
57 * Halt the current CPU until interrupt event.
58 */
59static inline void cpu_halt(void) { __asm__("hlt"); };
60static inline void cpu_sleep(void) { __asm__("hlt"); };
[f761f1eb]61
[18e0a6c]62/** Read CR2
63 *
64 * Return value in CR2
65 *
66 * @return Value read.
67 */
68static inline __u32 read_cr2(void) { __u32 v; __asm__ volatile ("movl %%cr2,%0" : "=r" (v)); return v; }
[0f4e706]69
[18e0a6c]70/** Write CR3
71 *
72 * Write value to CR3.
73 *
74 * @param v Value to be written.
75 */
76static inline void write_cr3(__u32 v) { __asm__ volatile ("movl %0,%%cr3\n" : : "r" (v)); }
77
78/** Read CR3
79 *
80 * Return value in CR3
81 *
82 * @return Value read.
83 */
84static inline __u32 read_cr3(void) { __u32 v; __asm__ volatile ("movl %%cr3,%0" : "=r" (v)); return v; }
85
86/** Write DR0
87 *
88 * Write value to DR0.
89 *
90 * @param v Value to be written.
91 */
92static inline void write_dr0(__u32 v) { __asm__ volatile ("movl %0,%%dr0\n" : : "r" (v)); }
93
94/** Read DR0
95 *
96 * Return value in DR0
97 *
98 * @return Value read.
99 */
100static inline __u32 read_dr0(void) { __u32 v; __asm__ volatile ("movl %%dr0,%0" : "=r" (v)); return v; }
101
102/** Set priority level low
103 *
104 * Enable interrupts and return previous
105 * value of EFLAGS.
106 */
107static inline pri_t cpu_priority_low(void) {
108 pri_t v;
109 __asm__ volatile (
110 "pushf\n"
111 "popl %0\n"
112 "sti\n"
113 : "=r" (v)
114 );
115 return v;
116}
117
118/** Set priority level high
119 *
120 * Disable interrupts and return previous
121 * value of EFLAGS.
122 */
123static inline pri_t cpu_priority_high(void) {
124 pri_t v;
125 __asm__ volatile (
126 "pushf\n"
127 "popl %0\n"
128 "cli\n"
129 : "=r" (v)
130 );
131 return v;
132}
133
134/** Restore priority level
135 *
136 * Restore EFLAGS.
137 */
138static inline void cpu_priority_restore(pri_t pri) {
139 __asm__ volatile (
140 "pushl %0\n"
141 "popf\n"
142 : : "r" (pri)
143 );
144}
145
146/** Return raw priority level
147 *
148 * Return EFLAFS.
149 */
150static inline pri_t cpu_priority_read(void) {
151 pri_t v;
152 __asm__ volatile (
153 "pushf\n"
154 "popl %0\n"
155 : "=r" (v)
156 );
157 return v;
158}
[c9b8c5c]159
[361635c]160/** Return base address of current stack
161 *
162 * Return the base address of the current stack.
163 * The stack is assumed to be STACK_SIZE bytes long.
[1fbbcd6]164 * The stack must start on page boundary.
[361635c]165 */
166static inline __address get_stack_base(void)
167{
168 __address v;
169
170 __asm__ volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1)));
171
172 return v;
173}
174
[f761f1eb]175#endif
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