source: mainline/arch/amd64/src/interrupt.c@ dd4d6b0

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since dd4d6b0 was 49a39c2, checked in by Ondrej Palkovsky <ondrap@…>, 19 years ago

Preliminary work on AMD userspace.

  • Property mode set to 100644
File size: 4.7 KB
Line 
1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <arch/interrupt.h>
30#include <print.h>
31#include <debug.h>
32#include <panic.h>
33#include <arch/i8259.h>
34#include <func.h>
35#include <cpu.h>
36#include <arch/asm.h>
37#include <mm/tlb.h>
38#include <mm/as.h>
39#include <arch.h>
40#include <symtab.h>
41#include <arch/asm.h>
42#include <proc/scheduler.h>
43#include <proc/thread.h>
44
45/*
46static void messy_stack_trace(__native *stack)
47{
48 __native *upper_limit = (__native *)(((__native)get_stack_base()) + STACK_SIZE);
49 char *symbol;
50
51 printf("Stack contents: ");
52 while (stack < upper_limit) {
53 symbol = get_symtab_entry((__address)*stack);
54 if (symbol)
55 printf("%s, ", symbol);
56 stack++;
57 }
58 printf("\n");
59}
60*/
61
62static void print_info_errcode(int n, struct interrupt_context *ctx)
63{
64 char *symbol;
65 __u64 *x = &ctx->stack[0];
66
67 if (!(symbol=get_symtab_entry(x[1])))
68 symbol = "";
69
70 printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n",n,__FUNCTION__);
71 printf("%%rip: %Q (%s)\n",ctx->stack[1],symbol);
72 printf("ERROR_WORD=%Q\n", ctx->stack[0]);
73 printf("%%rcs=%Q,flags=%Q, %%cr0=%Q\n", ctx->stack[2],
74 ctx->stack[3],read_cr0());
75 printf("%%rax=%Q, %%rbx=%Q, %%rcx=%Q\n",ctx->rax,ctx->rbx,ctx->rcx);
76 printf("%%rdx=%Q, %%rsi=%Q, %%rdi=%Q\n",ctx->rdx,ctx->rsi,ctx->rdi);
77 printf("%%r8 =%Q, %%r9 =%Q, %%r10=%Q\n",ctx->r8,ctx->r9,ctx->r10);
78 printf("%%r11=%Q, %%r12=%Q, %%r13=%Q\n",ctx->r11,ctx->r12,ctx->r13);
79 printf("%%r14=%Q, %%r15=%Q, %%rsp=%Q\n",ctx->r14,ctx->r15,&ctx->stack[0]);
80 printf("%%rbp=%Q\n",ctx->rbp);
81 printf("stack: %Q, %Q, %Q\n", x[5], x[6], x[7]);
82 printf(" %Q, %Q, %Q\n", x[8], x[9], x[10]);
83 printf(" %Q, %Q, %Q\n", x[11], x[12], x[13]);
84 printf(" %Q, %Q, %Q\n", x[14], x[15], x[16]);
85// messy_stack_trace(&x[5]);
86}
87
88/*
89 * Interrupt and exception dispatching.
90 */
91
92void (* disable_irqs_function)(__u16 irqmask) = NULL;
93void (* enable_irqs_function)(__u16 irqmask) = NULL;
94void (* eoi_function)(void) = NULL;
95
96void null_interrupt(int n, struct interrupt_context *ctx)
97{
98 printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n",n,__FUNCTION__); \
99 printf("stack: %X, %X, %X, %X\n", ctx->stack[0], ctx->stack[1],
100 ctx->stack[2], ctx->stack[3]);
101 panic("unserviced interrupt\n");
102}
103
104void gp_fault(int n, void *stack)
105{
106 print_info_errcode(n,stack);
107 panic("general protection fault\n");
108}
109
110void ss_fault(int n, void *stack)
111{
112 print_info_errcode(n,stack);
113 panic("stack fault\n");
114}
115
116
117void nm_fault(int n, void *stack)
118{
119#ifdef CONFIG_FPU_LAZY
120 scheduler_fpu_lazy_request();
121#else
122 panic("fpu fault");
123#endif
124}
125
126void page_fault(int n, struct interrupt_context *ctx)
127{
128 __address page;
129
130 page = read_cr2();
131 if (!as_page_fault(page)) {
132 print_info_errcode(n,ctx);
133 printf("Page fault address: %Q\n", page);
134 panic("page fault\n");
135 }
136}
137
138void tlb_shootdown_ipi(int n, void *stack)
139{
140 trap_virtual_eoi();
141 tlb_shootdown_ipi_recv();
142}
143
144void wakeup_ipi(int n, void *stack)
145{
146 trap_virtual_eoi();
147}
148
149void trap_virtual_enable_irqs(__u16 irqmask)
150{
151 if (enable_irqs_function)
152 enable_irqs_function(irqmask);
153 else
154 panic("no enable_irqs_function\n");
155}
156
157void trap_virtual_disable_irqs(__u16 irqmask)
158{
159 if (disable_irqs_function)
160 disable_irqs_function(irqmask);
161 else
162 panic("no disable_irqs_function\n");
163}
164
165void trap_virtual_eoi(void)
166{
167 if (eoi_function)
168 eoi_function();
169 else
170 panic("no eoi_function\n");
171
172}
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